Definitions of equivalence for transformational synthesis of embedded systems

L. Cortés, P. Eles, Zebo Peng
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引用次数: 10

Abstract

Design of embedded systems is a complex task that requires design cycles founded upon formal notation, so that the synthesis from specification to implementation can be carried out systematically. The authors present a computational model for embedded systems based on Petri nets called PRES+. It includes an explicit notion of time and allows a concise formulation of models. Tokens, in our notation hold information, and transitions when fired perform transformation of data. Based on this model we define several notions of equivalence (reachable, behavioral, time, and total), which provide the framework for transformational synthesis of embedded systems. Different representations of an Ethernet network coprocessor are studied in order to illustrate the applicability of PRES+ and the definitions of equivalence on practical systems.
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嵌入式系统转换综合的等价定义
嵌入式系统的设计是一项复杂的任务,需要建立在形式化符号基础上的设计周期,以便从规范到实现的综合可以系统地进行。作者提出了一种基于Petri网的嵌入式系统计算模型PRES+。它包括一个明确的时间概念,并允许模型的简明表述。在我们的表示法中,令牌保存信息,触发转换时执行数据转换。基于这个模型,我们定义了几个等价的概念(可达的、行为的、时间的和总量的),它们为嵌入式系统的转换综合提供了框架。研究了以太网协处理器的不同表示形式,以说明PRES+和等价定义在实际系统中的适用性。
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