PLC Keynote

Abstract

Summary form only given. Heterogeneous designs are becoming ubiquitous across many new systemarchitectures as architects are turning to accelerators to deliver increased system performance and capability. In order to realize the potential of these heterogeneous designs, a framework is needed to support applications to take advantage of system capabilities. A suitable framework will depend on a combination of hardware primitives and software programming models. Together, hardware and software for heterogeneous multicore designs have to address the four "P"s of modern system design: Productivity, Portability, Performance, and Partitioning. To support current software deployment models, hardware primitives and programming models must ensure application isolation for partitioned virtual machine environments and application portability across a broad range of heterogeneous system design offerings. Hardware primitives and programming models must enable data center architects to build systems that continue scaling up performance and application developers to develop their applications with the necessary productivity. The Coherent Accelerator Processor Interface (CAPI) provides the basis for such a framework as integration point of accelerators into the POWER system architecture. CAPI accelerators can access application data directly using an integrated MMU. The CAPI MMU also provides partition isolation. Enabling accelerators to manage and pace their data access simplifies programming and prevents the CPUs from becoming serial bottlenecks. Finally, CAPI provides pointer identify, i.e., it enables the same address to be used in both CPU and accelerator to retrieve the same objects from memory. Pointer identity lays the foundation for high performance and high productivity accelerator programming models.