A. Garg, K. Prakash, N. Jain, N. Gupta, Sanjeev Kumar, A. Singh
{"title":"III-V heterostructure based three terminal thermal rectifier","authors":"A. Garg, K. Prakash, N. Jain, N. Gupta, Sanjeev Kumar, A. Singh","doi":"10.1109/PIERS.2017.8262397","DOIUrl":null,"url":null,"abstract":"A novel three terminal nano-rectifier which utilizes dissipated thermal energy to produce electrical signals is designed and analyzed. The device is simulated using different models including standard mobility model, negative differential mobility model and energy balance model. The electrical (DC and RF) performances of the rectifier have been obtained at room temperature in push-fixed configuration at the input terminals. Due to the planar architecture, device exhibits less parasitic capacitance enabling very high speed operation. The results demonstrate velocity saturation effect at nanoscale affecting the device performances.","PeriodicalId":387984,"journal":{"name":"2017 Progress In Electromagnetics Research Symposium - Spring (PIERS)","volume":"163 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2017-05-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"2","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"2017 Progress In Electromagnetics Research Symposium - Spring (PIERS)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/PIERS.2017.8262397","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 2
Abstract
A novel three terminal nano-rectifier which utilizes dissipated thermal energy to produce electrical signals is designed and analyzed. The device is simulated using different models including standard mobility model, negative differential mobility model and energy balance model. The electrical (DC and RF) performances of the rectifier have been obtained at room temperature in push-fixed configuration at the input terminals. Due to the planar architecture, device exhibits less parasitic capacitance enabling very high speed operation. The results demonstrate velocity saturation effect at nanoscale affecting the device performances.