A 16bit 1MS/s High-Bit Sampling SAR ADC with Improved Binary-Weighted Capacitive Array

Bowei An, Shoudong Huang, Zhongjian Chen, Zhiqiang Lu, Wengao Lu, Yacong Zhang
{"title":"A 16bit 1MS/s High-Bit Sampling SAR ADC with Improved Binary-Weighted Capacitive Array","authors":"Bowei An, Shoudong Huang, Zhongjian Chen, Zhiqiang Lu, Wengao Lu, Yacong Zhang","doi":"10.1109/ICICM50929.2020.9292270","DOIUrl":null,"url":null,"abstract":"This paper presents a 16-bit 1MS/s successive approximation register (SAR) analog-to-digital converters (ADC) for precision measurement in 180nm technology. High-bit sampling makes the bridge capacitor become unit capacitance, which solves the problem of fractional capacitor mismatch. In addition, thermometer-coded capacitors are used to improve linearity. The prototype achieves 104.3dB spurious-free dynamic range (SFDR) at 3.9kHz input signal while operating at sampling rate of 1 MS/s and the power consumption is 7.85 mW.","PeriodicalId":364285,"journal":{"name":"2020 IEEE 5th International Conference on Integrated Circuits and Microsystems (ICICM)","volume":"931 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2020-10-23","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"2","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"2020 IEEE 5th International Conference on Integrated Circuits and Microsystems (ICICM)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ICICM50929.2020.9292270","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 2

Abstract

This paper presents a 16-bit 1MS/s successive approximation register (SAR) analog-to-digital converters (ADC) for precision measurement in 180nm technology. High-bit sampling makes the bridge capacitor become unit capacitance, which solves the problem of fractional capacitor mismatch. In addition, thermometer-coded capacitors are used to improve linearity. The prototype achieves 104.3dB spurious-free dynamic range (SFDR) at 3.9kHz input signal while operating at sampling rate of 1 MS/s and the power consumption is 7.85 mW.
查看原文
分享 分享
微信好友 朋友圈 QQ好友 复制链接
本刊更多论文
基于改进二值加权电容阵列的16位1MS/s高位采样SAR ADC
本文提出了一种用于180nm精密测量的16位1MS/s逐次逼近寄存器(SAR)模数转换器(ADC)。高位采样使桥接电容变为单位电容,解决了分数电容失配的问题。此外,温度计编码电容器用于改善线性度。该样机在3.9kHz输入信号下实现104.3dB无杂散动态范围(SFDR),工作采样率为1 MS/s,功耗为7.85 mW。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
求助全文
约1分钟内获得全文 去求助
来源期刊
自引率
0.00%
发文量
0
期刊最新文献
A Method of Impedance Imbalance Analysis for Passive Device A UVM Verification Platform for RISC-V SoC from Module to System Level The Property of ITO Produced by Optical Thin Film Coating for Solar Cell Research on Beam Widening of Rotman Lens A Multi-User Detector with Adaptive Iterative times in Scrambled Coded Multiple Access (SCMA) Systems
×
引用
GB/T 7714-2015
复制
MLA
复制
APA
复制
导出至
BibTeX EndNote RefMan NoteFirst NoteExpress
×
×
提示
您的信息不完整,为了账户安全,请先补充。
现在去补充
×
提示
您因"违规操作"
具体请查看互助需知
我知道了
×
提示
现在去查看 取消
×
提示
确定
0
微信
客服QQ
Book学术公众号 扫码关注我们
反馈
×
意见反馈
请填写您的意见或建议
请填写您的手机或邮箱
已复制链接
已复制链接
快去分享给好友吧!
我知道了
×
扫码分享
扫码分享
Book学术官方微信
Book学术文献互助
Book学术文献互助群
群 号:481959085
Book学术
文献互助 智能选刊 最新文献 互助须知 联系我们:info@booksci.cn
Book学术提供免费学术资源搜索服务,方便国内外学者检索中英文文献。致力于提供最便捷和优质的服务体验。
Copyright © 2023 Book学术 All rights reserved.
ghs 京公网安备 11010802042870号 京ICP备2023020795号-1