Towards highly parallel event processing through reconfigurable hardware

Mohammad Sadoghi, Harsh V. P. Singh, H. Jacobsen
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引用次数: 30

Abstract

We present fpga-ToPSS (Toronto Publish/Subscribe System), an efficient event processing platform to support high-frequency and low-latency event matching. fpga-ToPSS is built over reconfigurable hardware---FPGAs---to achieve line-rate processing by exploring various degrees of parallelism. Furthermore, each of our proposed FPGA-based designs is geared towards a unique application requirement, such as flexibility, adaptability, scalability, or pure performance, such that each solution is specifically optimized to attain a high level of parallelism. Therefore, each solution is formulated as a design trade-off between the degree of parallelism versus the desired application requirement. Moreover, our event processing engine supports Boolean expression matching with an expressive predicate language applicable to a wide range of applications including real-time data analysis, algorithmic trading, targeted advertisement, and (complex) event processing.
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通过可重构硬件实现高度并行的事件处理
我们提出了fpga-ToPSS(多伦多发布/订阅系统),一个高效的事件处理平台,支持高频率和低延迟的事件匹配。fpga-ToPSS是建立在可重构硬件——fpga——通过探索不同程度的并行性来实现线速率处理。此外,我们提出的每个基于fpga的设计都针对独特的应用需求,例如灵活性,适应性,可扩展性或纯粹的性能,因此每个解决方案都经过专门优化以获得高水平的并行性。因此,每个解决方案都是在并行度与期望的应用程序需求之间的设计权衡。此外,我们的事件处理引擎支持布尔表达式匹配与一个表达谓词语言适用于广泛的应用程序,包括实时数据分析,算法交易,目标广告,和(复杂的)事件处理。
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