Comparison of time domain package characterization techniques using TDR and VNA

M. Engl, W. Eurskens, R. Weigel
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引用次数: 4

Abstract

As operating frequencies rise and supply voltages decrease, the electrical performance of packages becomes more and more important. Hence, parasitic effects and electrical characterization of packages play an important role for todays and future applications. In this paper, we describe a state-of-the-art time domain reflectometry measurement technique and evaluate its applicability to package characterization. Furthermore, we compare the results obtained from a conventional time domain reflectometer (TDR) with that of a vector network analyzer (VNA). Since the VNA is actually operating in frequency domain, its results are transformed to the time domain. As test samples, several packages containing integrated circuits with defined standards like short, open and load were measured. The results show that time domain reflectometry techniques are well suited for failure analysis and package characterization. Besides it turned out that the results from the VNA are superior
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时域封装表征技术的TDR与VNA之比较
随着工作频率的上升和电源电压的降低,封装的电气性能变得越来越重要。因此,封装的寄生效应和电特性在今天和未来的应用中起着重要的作用。在本文中,我们描述了一种最先进的时域反射测量技术,并评估了其在封装表征中的适用性。此外,我们比较了传统时域反射仪(TDR)和矢量网络分析仪(VNA)的结果。由于VNA实际上是在频域工作的,所以它的结果被转换到时域。作为测试样品,测量了几个包含集成电路的封装,这些集成电路具有定义的标准,如短路、开路和负载。结果表明,时域反射技术非常适合于失效分析和封装表征。此外,VNA的结果也更优越
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