Designing a FlexRay controller — From SDL to StateFlow and Simulink blocks: Generation and verification

Abstract

The need to exchange large amounts of information in all fields especially in the automotive one, with minimal space requirements, weight, complexity of conjunction and cost, perform the development of several automotive networks such as Local Interconnect Network (LIN), Controller Area Network (CAN), Time Triggered Protocol (CAN) and FlexRay. The CAN is currently the most used, but it has many limits. It is not strictly deterministic and it is not the ideal protocol for application that needs high degree of safety. These drawbacks have been the starting points for the development of the FlexRay protocol which is more efficient than CAN protocol. We adopted a new way to achieve the design and the implementation of the FlexRay Controller which consists of the translation of the (Specification and Description Language) SDL diagrams into StateFlow diagrams. With these diagrams, we generate the VHDL code of the controller which will be implemented in an FPGA to create the hardware chip for FlexRay. We had used ModelSim to verify the correctness of the designed blocks. We give in this paper the adopted procedure for the Macrotick block Generation and its verification by ModelSim.