Small-Size low losses WLAN and GSM/DCS diplexers integrated in a low cost 130 nm high resistivity SOI CMOS technology

Abstract

RF front end module (FEMs) are currently realized using a variety of technologies. However, since integration drives wireless business in order to achieve the appropriate cost and form factor, we see significant research concerning FEM integration on silicon [1]. In this quest, SOI technology has already addressed two key blocks, the antenna switch and the power amplifier. In this paper, we will focus our investigation on high performance passives functions in order to demonstrate the capability of SOI CMOS technology to integrate the whole FEM. To do so, WLAN and GSM/DCS diplexers have been achieved in a 130 nm SOI CMOS technology. Measured performances (insertion losses ~1dB and isolation greater than 20 dB) are clearly competitive with most commercially available Integrated Device Passive (IPD) solutions.