Shallow Trench Isolation stress effect on CMOS transistors with different channel orientations

Abstract

In this paper, we studied the effect of mechanical stress due to Shallow Trench Isolation (STI) on the channel length direction (x-stress) and channel width direction (y-stress) by adopting two different channel orientations; <;110> and <;100>. When change from <;110> to <;100> channel orientation, PMOS sensitivity to both STI x-stress and y-stress reduces. For NMOS, both the channel orientations show the similar STI x-stress and y-stress effects. STI x-stress effects of NMOS and PMOS is contradicting. Hence, by adopting <;100> channel, the performance of PMOS can be improved without degrading the NMOS performance. The STI x-stress and y-stress effects on NMOS and PMOS transistors with <;110> and <;100> channel orientation are explained by using the electron and hole energy valleys diagrams.