An Evaluation of High-Performance Embedded Processing on MPPAs

Zain-ul-Abdin, B. Svensson
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Abstract

Embedded signal processing is facing the challenges of increased performance as well as to achieve energy efficiency. Massively parallel processor arrays (MPPAs) consisting of hundreds of processing cores offer the possibility of meeting the growing performance demand in an energy efficient way by exploiting parallelism instead of scaling the clock frequency of a single processor. In this paper we evaluate two selected commercial architectures belonging to the category of MPPA. The adopted approach for the evaluation is to implement a real, industrial application in the form of compute-intensive parts of Synthetic Aperture Radar (SAR) systems.
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MPPAs的高性能嵌入式处理评价
嵌入式信号处理面临着提高性能和实现能源效率的挑战。由数百个处理核心组成的大规模并行处理器阵列(MPPAs)通过利用并行性而不是缩放单个处理器的时钟频率,以节能的方式满足日益增长的性能需求。在本文中,我们评估了两个选择属于MPPA类别的商业架构。所采用的评估方法是以合成孔径雷达(SAR)系统的计算密集型部件的形式实现实际的工业应用。
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