Jialin Cai, Chao Yu, Lingling Sun, Jun Liu, Jiangtao Su
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引用次数: 0
Abstract
A load-pull based method was used to achieve the best load matching impedance for a VHF band complementary metal oxide semiconductor (CMOS) power amplifier (PA). With the employ of the new technique, PA designers can not only target the load impedance area which provides the maximum output power, but also can maintain the PA with the best output third-order interception point (OIP3). Both schematic and post-layout simulations are provided to validate the effectiveness of the new technique.
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