Reducing power density through activity migration

Seongmoo Heo, K. Barr, K. Asanović
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引用次数: 341

Abstract

Power dissipation is unevenly distributed in modern microprocessors leading to localized hot spots with significantly greater die temperature than surrounding cooler regions. Excessive junction temperature reduces reliability and can lead to catastrophic failure. We examine the use of activity migration which reduces peak junction temperature by moving computation between multiple replicated units. Using a thermal model that includes the temperature dependence of leakage power, we show that sustainable power dissipation can be increased by nearly a factor of two for a given junction temperature limit. Alternatively, peak die temperature can be reduced by 12.4/spl deg/C at the same clock frequency. The model predicts that migration intervals of around 20-200 /spl mu/s are required to achieve the maximum sustainable power increase. We evaluate several different forms of replication and migration policy control.
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通过活动迁移降低功率密度
在现代微处理器中,功耗分布不均匀,导致局部热点的芯片温度明显高于周围较冷的区域。过高的结温降低了可靠性,并可能导致灾难性的故障。我们研究了通过在多个复制单元之间移动计算来降低峰值结温的活动迁移的使用。使用包含泄漏功率的温度依赖性的热模型,我们表明在给定的结温极限下,可持续功耗可以增加近两倍。或者,在相同的时钟频率下,峰值芯片温度可以降低12.4/spl度/C。该模型预测,要实现最大的可持续电力增长,迁移间隔约为20-200 /spl mu/s。我们评估了几种不同形式的复制和迁移策略控制。
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Voltage scheduling under unpredictabilities: a risk management paradigm [logic design] Uncertainty-based scheduling: energy-efficient ordering for tasks with variable execution time [processor scheduling] Level conversion for dual-supply systems [low power logic IC design] A selective filter-bank TLB system [embedded processor MMU for low power] A semi-custom voltage-island technique and its application to high-speed serial links [CMOS active power reduction]
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