Trusting the trust anchor: towards detecting cross-layer vulnerabilities with hardware fuzzing

Chen Chen, Rahul Kande, Pouya Mahmoody, A. Sadeghi, J. Rajendran
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引用次数: 1

Abstract

The rise in the development of complex and application-specific commercial and open-source hardware and the shrinking verification time are causing numerous hardware-security vulnerabilities. Traditional verification techniques are limited in both scalability and completeness. Research in this direction is hindered due to the lack of robust testing benchmarks. In this paper, in collaboration with our industry partners, we built an ecosystem mimicking the hardware-development cycle where we inject bugs inspired by real-world vulnerabilities into RISC-V SoC design and organized an open-to-all bug-hunting competition. We equipped the participating researchers with industry-standard static and dynamic verification tools in a ready-to-use environment. The findings from our competition shed light on the strengths and weaknesses of the existing verification tools and highlight the potential for future research in developing new vulnerability detection techniques.
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信任锚:通过硬件模糊测试检测跨层漏洞
复杂的、特定于应用程序的商业和开源硬件开发的增加以及验证时间的缩短导致了许多硬件安全漏洞。传统的验证技术在可扩展性和完整性方面都受到限制。由于缺乏可靠的测试基准,这方面的研究受到阻碍。在本文中,我们与行业合作伙伴合作,建立了一个模仿硬件开发周期的生态系统,在该生态系统中,我们将受现实世界漏洞启发的漏洞注入RISC-V SoC设计中,并组织了一场面向所有人的漏洞搜索比赛。我们在现成的环境中为参与的研究人员配备了工业标准的静态和动态验证工具。我们的竞赛结果揭示了现有验证工具的优缺点,并强调了未来研究开发新的漏洞检测技术的潜力。
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