An Efficient Fault Detection and Diagnosis Methodology for Volatile and Non-Volatile Memories

Abstract

Memory reliability and testability are considered as primary requirements for achieving high production yield in nowadays system on chips (SoCs). For that purpose, different testing methods and diagnosis flows were proposed in the past. The fault models and test mechanisms can be different when dealing with volatile and non-volatile memories. This paper describes an efficient test methodology for detection and diagnosis of faults in both volatile and non-volatile types of memories.