Glossary B

Abstract

32-Bit Program A program compiles to run in 32-bit mode. For example, programs compiled for the PA RISC 1.x processors. 64-Bit Program A program compiled to run in 64-bit mode. For example, programs compiled for the PA-RISC 2.0 processor in wide mode. Adapter Card Physical hardware, under software control, which is typically attached either directly to an I/O bus or to an auxiliary bus (e.g. SCSI) attached to a directly connected adapter. A device typically combines a hardware controller with the mechanism (e.g. disk controller with disk). 100BT 100BASE-T is the technical term for the Fast Ethernet or IEEE802.3u standard. Attach Chain A linked list of driver attach routines (_attach). As a hardware module is being configured, this list is walked to allow each driver in the system a chance to recognize and claim the hardware module. Auto load A capability made possible via the DLKM feature. I occurs whenthe kernel detects a particular loadable module is required to accomplish some task, but the module is not currently loaded. The kernel automatically loads the module. During an auto load, the kernel also loads any modules that the module being loaded depends upon, just as it does during a demand load. BAR Base Address Register. On a PCI card, one of the registers in PCI configuration space that contains the size and alignment requirements needed to map the card's registers. Each one also contains information (encoded in the low-order bits of the register) indicating whether they are base registers for PCI memory space or for PCI I/O space. The system reads and decodes this information and writes a PCI address back into these registers when it initially maps them in. Base address registers contain PCI addresses when set up. Beta Semaphore Mutually-exclusive, blocking semaphores. When a thread acquires a beta semaphore, it is released. The owning thread may subsequently block (i.e., sleep) and still keep ownership. Threads waiting to acquire an owned beta semaphore are blocked. Bus Mastering The act of taking over a bus and generating cycles on it. A bus master is any piece of hardware that creates read or write cycles on the PCI bus. Typical cards become bus masters only when they perform DMA, although any card-initiated cycle (for example, a peer-to-peer transaction) is an example of bus mastering.