Effects of the Analog and Digital Previous Pulse with Filter on the Synchronizer

A. Reis, J. F. Rocha, A. Gameiro, J. P. Carvalho
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Abstract

We will study the effects of the analog and digital previous pulse on the synchronizer jitter.We consider two previous pulse (analog or digital) with filter followed of the synchronizer. The synchronizer is one of four carrier PLL (Phase Lock Loop) namely the analog, the hybrid, the combinational and the sequential.The main objective is to observe for the various carrier PLL, their output jitter UIRMS (Unit Interval Root Mean Squared) versus input SNR (Signal to Noise Ratio).
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带滤波器的模拟和数字前脉冲对同步器的影响
我们将研究模拟前脉冲和数字前脉冲对同步器抖动的影响。我们考虑两个前脉冲(模拟或数字)与滤波器后的同步器。同步器是模拟锁相环、混合锁相环、组合锁相环和顺序锁相环四种载波之一。主要目的是观察各种载波锁相环的输出抖动UIRMS(单位间隔均方根)与输入信噪比(信噪比)的关系。
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