{"title":"Low voltage low power sub-threshold operational amplifier in 180nm CMOS","authors":"C. Yadav, Sunita Prasad","doi":"10.1109/SSPS.2017.8071560","DOIUrl":null,"url":null,"abstract":"A two-stage operational amplifier for biomedical applications is presented in this paper. In the Op-Amp design, all transistors have been operated in sub-threshold region for low voltage low power application. The proposed Op-Amp has been designed based on TSMC foundry 180nm process and simulated in Cadence analog design environment. The proposed circuit generates a 40dB gain, 114 KHz UGBW, 72 deg phase margin & total power consumption is just 112nW with 0.8V battery.","PeriodicalId":382353,"journal":{"name":"2017 Third International Conference on Sensing, Signal Processing and Security (ICSSS)","volume":"122 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2017-05-04","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"10","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"2017 Third International Conference on Sensing, Signal Processing and Security (ICSSS)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/SSPS.2017.8071560","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 10
Abstract
A two-stage operational amplifier for biomedical applications is presented in this paper. In the Op-Amp design, all transistors have been operated in sub-threshold region for low voltage low power application. The proposed Op-Amp has been designed based on TSMC foundry 180nm process and simulated in Cadence analog design environment. The proposed circuit generates a 40dB gain, 114 KHz UGBW, 72 deg phase margin & total power consumption is just 112nW with 0.8V battery.
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