Improved SOI-MESFET structures for enhanced efficiency and optimized DC/RF characteristics

IF 1.1 4区 工程技术 Q4 ENGINEERING, ELECTRICAL & ELECTRONIC International Journal of Electronics Pub Date : 2023-10-06 DOI:10.1080/00207217.2023.2267212
Ahmad Ghiasi, Salah I. Yahya, Abbas Rezaei
{"title":"Improved SOI-MESFET structures for enhanced efficiency and optimized DC/RF characteristics","authors":"Ahmad Ghiasi, Salah I. Yahya, Abbas Rezaei","doi":"10.1080/00207217.2023.2267212","DOIUrl":null,"url":null,"abstract":"ABSTRACTIn this paper, two new silicon on insulator metal-semiconductor field effect transistor (SOI-MESFET) structures are presented. Two parallel layers of oxide and aluminium are added at the gate edge of these structures. Also, in the buried oxide part of the Aluminium Edge and Silicon-Well MESFET (AESW-MESFET) structure, a silicon well and two aluminium layers are added. Moreover, and to improve the DC and RF characteristics, as compared to the Conventional MESFET (C-MESFET) structure, a silicon well and a silicon layer are added in the box oxide section in the Silicon Edge and Silicon-Well MESFET (SESW-MESFET) structure. By these changes, the value of the breakdown voltage in the normal structure has increased from 15.8 V to 33.1 V and 30.9 V in the proposed AESW-MESFET and SESW-MESFET structures, respectively. In addition, the maximum output power has been associated with a significant increase of 4.44 and 5.24 times, respectively. Compared to the C-MESFET, the proposed structures reduce gate-source and gate-drain capacitors and significantly increases conductivity. The cut-off frequency values are increased from 19.3 GHz (the normal structure) to 37.3 GHz and 35 GHz (the proposed structures), and the maximum oscillation frequencies are increased from 80 GHz to 154 GHz and 102.3 GHz. Therefore, the results show that the proposed structures have good performance and the ability to work at high power and high frequency.KEYWORDS: SOI-MESFETBreakdown voltageElectric fieldCut-off frequency (FT)maximum oscillation frequency (Fmax)DisclaimerAs a service to authors and researchers we are providing this version of an accepted manuscript (AM). Copyediting, typesetting, and review of the resulting proofs will be undertaken on this manuscript before final publication of the Version of Record (VoR). During production and pre-press, errors may be discovered which could affect the content, and all legal disclaimers that apply to the journal relate to these versions also. Data Availability StatementNo Data associated in the manuscript.","PeriodicalId":54961,"journal":{"name":"International Journal of Electronics","volume":"299 1","pages":"0"},"PeriodicalIF":1.1000,"publicationDate":"2023-10-06","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"International Journal of Electronics","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1080/00207217.2023.2267212","RegionNum":4,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"Q4","JCRName":"ENGINEERING, ELECTRICAL & ELECTRONIC","Score":null,"Total":0}
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Abstract

ABSTRACTIn this paper, two new silicon on insulator metal-semiconductor field effect transistor (SOI-MESFET) structures are presented. Two parallel layers of oxide and aluminium are added at the gate edge of these structures. Also, in the buried oxide part of the Aluminium Edge and Silicon-Well MESFET (AESW-MESFET) structure, a silicon well and two aluminium layers are added. Moreover, and to improve the DC and RF characteristics, as compared to the Conventional MESFET (C-MESFET) structure, a silicon well and a silicon layer are added in the box oxide section in the Silicon Edge and Silicon-Well MESFET (SESW-MESFET) structure. By these changes, the value of the breakdown voltage in the normal structure has increased from 15.8 V to 33.1 V and 30.9 V in the proposed AESW-MESFET and SESW-MESFET structures, respectively. In addition, the maximum output power has been associated with a significant increase of 4.44 and 5.24 times, respectively. Compared to the C-MESFET, the proposed structures reduce gate-source and gate-drain capacitors and significantly increases conductivity. The cut-off frequency values are increased from 19.3 GHz (the normal structure) to 37.3 GHz and 35 GHz (the proposed structures), and the maximum oscillation frequencies are increased from 80 GHz to 154 GHz and 102.3 GHz. Therefore, the results show that the proposed structures have good performance and the ability to work at high power and high frequency.KEYWORDS: SOI-MESFETBreakdown voltageElectric fieldCut-off frequency (FT)maximum oscillation frequency (Fmax)DisclaimerAs a service to authors and researchers we are providing this version of an accepted manuscript (AM). Copyediting, typesetting, and review of the resulting proofs will be undertaken on this manuscript before final publication of the Version of Record (VoR). During production and pre-press, errors may be discovered which could affect the content, and all legal disclaimers that apply to the journal relate to these versions also. Data Availability StatementNo Data associated in the manuscript.
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改进SOI-MESFET结构,提高效率和优化DC/RF特性
摘要本文提出了两种新型绝缘体上硅金属半导体场效应晶体管(SOI-MESFET)结构。在这些结构的栅极边缘添加了两层平行的氧化物和铝。此外,在铝边和硅阱MESFET (AESW-MESFET)结构的埋氧化物部分,增加了一个硅阱和两个铝层。此外,为了改善直流和射频特性,与传统的MESFET (C-MESFET)结构相比,在硅边和硅阱MESFET (SESW-MESFET)结构的盒氧化部分增加了一个硅井和一个硅层。通过这些变化,正常结构的击穿电压值从15.8 V增加到AESW-MESFET和SESW-MESFET结构的33.1 V和30.9 V。此外,最大输出功率分别显著提高了4.44倍和5.24倍。与C-MESFET相比,所提出的结构减少了栅极源和栅极漏电容,并显着提高了电导率。截止频率值从19.3 GHz(正常结构)提高到37.3 GHz和35 GHz(建议结构),最大振荡频率从80 GHz提高到154 GHz和102.3 GHz。结果表明,所提出的结构具有良好的性能,能够在高功率和高频率下工作。关键词:soi - mesfette击穿电压电场截止频率(FT)最大振荡频率(Fmax)免责声明作为对作者和研究人员的服务,我们提供此版本的接受稿件(AM)。在最终出版版本记录(VoR)之前,将对该手稿进行编辑、排版和审查。在制作和印前,可能会发现可能影响内容的错误,所有适用于期刊的法律免责声明也与这些版本有关。数据可用性声明无与稿件相关的数据。
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来源期刊
International Journal of Electronics
International Journal of Electronics 工程技术-工程:电子与电气
CiteScore
3.30
自引率
15.40%
发文量
110
审稿时长
8 months
期刊介绍: The International Journal of Electronics (IJE) supports technical applications and developing research at the cutting edge of electronics. Encompassing a broad range of electronic topics, we are a leading electronics journal dedicated to quickly sharing new concepts and developments the field of electronics.
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