{"title":"A distributed algorithm to schedule TSCH links under the SINR model","authors":"José Carlos da Silva, Flávio Assis","doi":"10.1007/s10617-018-9216-1","DOIUrl":null,"url":null,"abstract":"Industrial environments are typically characterised by high levels of interference. Therefore, standards for industrial wireless sensor networks (WirelessHART, ISA 100.11a, and IEEE 802.15.4e) have defined a time division and multichannel-based mode of operation, in which pairs of time slots and channels are assigned to links representing communication between nodes. In IEEE 802.15.4e this mode of operation is called <i>Timed Slotted Channel Hopping</i>. In this paper we describe a distributed algorithm to define such an assignment for a given network. The algorithm is efficient, scalable and was developed for the <i>Signal-to-Interference-plus-Noise-Ratio</i> model, currently considered the most appropriate to analyse algorithms for wireless networks when interference is taken into consideration. In particular, the algorithm provides <i>deterministic</i> communication in the network. Previous approaches to this problem are mainly centralised, based on a simple (or none) interference model, do not provide deterministic communication or do not consider multiple physical channels. In this paper we describe the algorithm and present results of simulation, where we evaluated the number of rounds needed for computing the schedules and the size of the produced schedules. The described algorithm applies also to the <i>Internet of Things</i>, characterised by high scale and presence of interference.","PeriodicalId":50594,"journal":{"name":"Design Automation for Embedded Systems","volume":"14 2","pages":"21-39"},"PeriodicalIF":0.9000,"publicationDate":"2018-11-29","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"5","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"Design Automation for Embedded Systems","FirstCategoryId":"94","ListUrlMain":"https://doi.org/10.1007/s10617-018-9216-1","RegionNum":4,"RegionCategory":"计算机科学","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"Q4","JCRName":"COMPUTER SCIENCE, HARDWARE & ARCHITECTURE","Score":null,"Total":0}
引用次数: 5
Abstract
Industrial environments are typically characterised by high levels of interference. Therefore, standards for industrial wireless sensor networks (WirelessHART, ISA 100.11a, and IEEE 802.15.4e) have defined a time division and multichannel-based mode of operation, in which pairs of time slots and channels are assigned to links representing communication between nodes. In IEEE 802.15.4e this mode of operation is called Timed Slotted Channel Hopping. In this paper we describe a distributed algorithm to define such an assignment for a given network. The algorithm is efficient, scalable and was developed for the Signal-to-Interference-plus-Noise-Ratio model, currently considered the most appropriate to analyse algorithms for wireless networks when interference is taken into consideration. In particular, the algorithm provides deterministic communication in the network. Previous approaches to this problem are mainly centralised, based on a simple (or none) interference model, do not provide deterministic communication or do not consider multiple physical channels. In this paper we describe the algorithm and present results of simulation, where we evaluated the number of rounds needed for computing the schedules and the size of the produced schedules. The described algorithm applies also to the Internet of Things, characterised by high scale and presence of interference.
期刊介绍:
Embedded (electronic) systems have become the electronic engines of modern consumer and industrial devices, from automobiles to satellites, from washing machines to high-definition TVs, and from cellular phones to complete base stations. These embedded systems encompass a variety of hardware and software components which implement a wide range of functions including digital, analog and RF parts.
Although embedded systems have been designed for decades, the systematic design of such systems with well defined methodologies, automation tools and technologies has gained attention primarily in the last decade. Advances in silicon technology and increasingly demanding applications have significantly expanded the scope and complexity of embedded systems. These systems are only now becoming possible due to advances in methodologies, tools, architectures and design techniques.
Design Automation for Embedded Systems is a multidisciplinary journal which addresses the systematic design of embedded systems, focusing primarily on tools, methodologies and architectures for embedded systems, including HW/SW co-design, simulation and modeling approaches, synthesis techniques, architectures and design exploration, among others.
Design Automation for Embedded Systems offers a forum for scientist and engineers to report on their latest works on algorithms, tools, architectures, case studies and real design examples related to embedded systems hardware and software.
Design Automation for Embedded Systems is an innovative journal which distinguishes itself by welcoming high-quality papers on the methodology, tools, architectures and design of electronic embedded systems, leading to a true multidisciplinary system design journal.