In situ plasma pin-up clean process for backside bevel polymer removal, defect reduction, and queue time relaxation

B. B. Ye, Ganquan Song, Jeff J. Ye
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Abstract

Polymeric residues and films of various thicknesses on the wafer backside and the edge frontside bevel and backside are known to cause substantial yield losses. An additional ex situ bevel etch step can clear away these buildups from the edge bevel area but not from the wafer backside. In this paper, we demonstrate a novel and innovative in situ pin-up plasma clean step that can effectively remove polymers from both the wafer backside and the edge bevel areas, eliminating the need for the bevel etch step. A physical analysis of blanket test wafers and patterned product wafers that have underwent the pin-up clean step in inductively coupled plasma and capacitively coupled plasma etch systems reveals that the pin-up clean step can reduce defect counts on product wafers and improve manufacturing cycle time and throughput by relaxing the queue time constraint.
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用于去除背面坡口聚合物、减少缺陷和放宽排队时间的原位等离子针刺清洁工艺
众所周知,晶圆背面、边缘正面斜面和背面的各种厚度的聚合物残留物和薄膜会造成大量的产量损失。额外的原位斜面蚀刻步骤可以清除边缘斜面区域的这些堆积物,但无法清除晶片背面的堆积物。在本文中,我们展示了一种新颖、创新的原位引脚等离子清洁步骤,可有效清除晶片背面和边缘斜面区域的聚合物,从而无需斜面蚀刻步骤。通过对在电感耦合等离子体和电容耦合等离子体蚀刻系统中经历了引脚向上清洁步骤的空白测试晶圆和图案化产品晶圆进行物理分析,发现引脚向上清洁步骤可以减少产品晶圆上的缺陷数量,并通过放宽排队时间限制来提高制造周期时间和产量。
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