Design and Analysis of a Low Voltage Simulink Model (LVSM) of IEEE 57 Bus

Abstract

The present power system is gaining momentum towards designing equivalent circuit models. The Ward and REI methods involve the admittance reduction method as well as being merged with the EMS model to derive boundary parameters, but these methods are limited and valid for a predefined condition. Therefore, it is required to design an equivalent circuit that adopts the real power system for analysis. In this paper, a new method is proposed to design a scaled-down power system model without changing the impedance of components. In this regard, a Low Voltage Simulink Model (LVSM) of the IEEE 57 bus network was designed in MATLAB/ Simulink so that it could be useful for laboratory model design purposes. The main objectives of this paper are to propose a mathematical procedure to scale down the network parameters and design a 3-phase LVSM of an IEEE 57 bus power system network within the Simulink platform. The performance of LVSM was analyzed with no-load, balanced load, and unbalanced load models. These simulation studies were validated and compared with the theoretical results to prove that the proposed LVSM modeling has good mathematical accuracy, robustness, and validity for practical model implementation.