Supporting Multi-Channels to DRAM-based PIM Execution for Boosting the Performance

Abstract

The memory bandwidth between a processor and memory limits the performance, especially in emerging data-intensive applications. To solve this problem, supporting in-memory processing has been actively studied. Most PIM platforms prepare all the input data before computation because of the significant overhead in the data preparation, which is much higher in multi-channel memory systems due to data duplication. In this paper, we developed a cost-effective DMA offloading methodology to support PIM computation in the multi-channel memory system. We minimized the data sharing overhead between channels and achieved a performance improvement of up to 1.79x compared to our baseline one-channel PIM architecture in the execution of DNN applications.