A CMOS Analog Front-End for Hall Sensor Readout IC

Abstract

This paper presents a CMOS analog front-end (AFE) for hall sensor readout IC. A three- operational amplifier-based instrumentation amplifier (IA) is employed for low noise amplification with high common mode rejection ratio. To address the input offset of the hall magnetic sensor, an internal offset cancellation circuit using a R-2R DAC is adopted. A 2nd order incremental ADC is used to convert the amplified analog input into 16-bit digital output. The proposed AFE is implemented in an 80nm CMOS process. It achieves a 6.8nV2 of the output noise power at a voltage gain of 40V/V and consumes 16.8mW from a 2.8V power supply.