Yinglong Ding, Lu Liu, Bin Wang, Xiaokun Lin, Shuoshuo Zhu, Peng Cheng
{"title":"A Low Noise, Low Power Capacitor Chopper Instrumentation Amplifier in 40nm CMOS for Biological Signal Acquisition","authors":"Yinglong Ding, Lu Liu, Bin Wang, Xiaokun Lin, Shuoshuo Zhu, Peng Cheng","doi":"10.1109/ICPECA60615.2024.10471145","DOIUrl":null,"url":null,"abstract":"A low noise capacitance-coupled chopper instrument amplifier for biological signal acquisition is presented. The chopper modulation technique is used to effectively suppress the 1/f noise of the circuit, and a positive feedback loop (PFL) is added to significantly improve the AC equivalent input impedance of the circuit. In addition, a DC servo loop (DSL) with selectable switching is added to eliminate the DC misalignment introduced by the electrodes up to 50mV. The instrumentation amplifier is realized in a 40nm CMOS process. The total current consumed at a 1.2V supply is 4μA. Simulation show that the CMRR and PSRR of the circuit are 87dB and 73dB respectively, and integration noise is 0.8μVrms in the range of 0.5 to 1kHz.","PeriodicalId":518671,"journal":{"name":"2024 IEEE 4th International Conference on Power, Electronics and Computer Applications (ICPECA)","volume":"65 1","pages":"848-852"},"PeriodicalIF":0.0000,"publicationDate":"2024-01-26","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"2024 IEEE 4th International Conference on Power, Electronics and Computer Applications (ICPECA)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ICPECA60615.2024.10471145","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 0
Abstract
A low noise capacitance-coupled chopper instrument amplifier for biological signal acquisition is presented. The chopper modulation technique is used to effectively suppress the 1/f noise of the circuit, and a positive feedback loop (PFL) is added to significantly improve the AC equivalent input impedance of the circuit. In addition, a DC servo loop (DSL) with selectable switching is added to eliminate the DC misalignment introduced by the electrodes up to 50mV. The instrumentation amplifier is realized in a 40nm CMOS process. The total current consumed at a 1.2V supply is 4μA. Simulation show that the CMRR and PSRR of the circuit are 87dB and 73dB respectively, and integration noise is 0.8μVrms in the range of 0.5 to 1kHz.
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