{"title":"MajorK: Majority Based kmer Matching in Commodity DRAM","authors":"Z. Jahshan;L. Yavits","doi":"10.1109/LCA.2024.3384259","DOIUrl":null,"url":null,"abstract":"Fast parallel search capabilities on large datasets are required across multiple application domains. One such domain is genome analysis, which requires high-performance \n<i>k</i>\nmer matching in large genome databases. Recently proposed solutions implemented \n<i>k</i>\nmer matching in DRAM, utilizing its sheer capacity and parallelism. However, their operation is essentially bit-serial, which ultimately limits the performance, especially when matching long strings, as customary in genome analysis pipelines. The proposed solution, MajorK, enables bit-parallel majority based \n<i>k</i>\nmer matching in an unmodified commodity DRAM. MajorK employs multiple DRAM row activation, where the search patterns (query \n<i>k</i>\nmers) are coded into DRAM addresses. We evaluate MajorK on viral genome \n<i>k</i>\nmer matching and show that it can achieve up to 2.7\n<inline-formula><tex-math>$ \\times $</tex-math></inline-formula>\n higher performance while providing a better matching accuracy compared to state-of-the-art DRAM based \n<i>k</i>\nmer matching accelerators.","PeriodicalId":51248,"journal":{"name":"IEEE Computer Architecture Letters","volume":"23 1","pages":"83-86"},"PeriodicalIF":1.4000,"publicationDate":"2024-04-02","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"IEEE Computer Architecture Letters","FirstCategoryId":"94","ListUrlMain":"https://ieeexplore.ieee.org/document/10488669/","RegionNum":3,"RegionCategory":"计算机科学","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"Q4","JCRName":"COMPUTER SCIENCE, HARDWARE & ARCHITECTURE","Score":null,"Total":0}
引用次数: 0
Abstract
Fast parallel search capabilities on large datasets are required across multiple application domains. One such domain is genome analysis, which requires high-performance
k
mer matching in large genome databases. Recently proposed solutions implemented
k
mer matching in DRAM, utilizing its sheer capacity and parallelism. However, their operation is essentially bit-serial, which ultimately limits the performance, especially when matching long strings, as customary in genome analysis pipelines. The proposed solution, MajorK, enables bit-parallel majority based
k
mer matching in an unmodified commodity DRAM. MajorK employs multiple DRAM row activation, where the search patterns (query
k
mers) are coded into DRAM addresses. We evaluate MajorK on viral genome
k
mer matching and show that it can achieve up to 2.7
$ \times $
higher performance while providing a better matching accuracy compared to state-of-the-art DRAM based
k
mer matching accelerators.
多个应用领域都需要对大型数据集进行快速并行搜索。基因组分析就是这样一个领域,它需要在大型基因组数据库中进行高性能 kmer 匹配。最近提出的解决方案在 DRAM 中实现了 kmer 匹配,充分利用了 DRAM 的容量和并行性。然而,它们的操作本质上是比特串行的,最终限制了性能,尤其是在匹配长字符串时,这在基因组分析流水线中很常见。建议的解决方案 MajorK 可以在未修改的商品 DRAM 中实现基于比特并行多数的 kmer 匹配。MajorK 采用多 DRAM 行激活,将搜索模式(查询 kmers)编码到 DRAM 地址中。我们在病毒基因组kmer匹配上对MajorK进行了评估,结果表明,与基于DRAM的最先进的kmer匹配加速器相比,MajorK可以实现高达2.7倍的性能提升,同时提供更好的匹配精度。
期刊介绍:
IEEE Computer Architecture Letters is a rigorously peer-reviewed forum for publishing early, high-impact results in the areas of uni- and multiprocessor computer systems, computer architecture, microarchitecture, workload characterization, performance evaluation and simulation techniques, and power-aware computing. Submissions are welcomed on any topic in computer architecture, especially but not limited to: microprocessor and multiprocessor systems, microarchitecture and ILP processors, workload characterization, performance evaluation and simulation techniques, compiler-hardware and operating system-hardware interactions, interconnect architectures, memory and cache systems, power and thermal issues at the architecture level, I/O architectures and techniques, independent validation of previously published results, analysis of unsuccessful techniques, domain-specific processor architectures (e.g., embedded, graphics, network, etc.), real-time and high-availability architectures, reconfigurable systems.