Capacitorless Two-Transistor Dynamic Random-Access Memory Cells Comprising Amorphous Indium–Tin–Gallium–Zinc Oxide Thin-Film Transistors for the Multiply–Accumulate Operation

Abstract

Capacitorless two-transistor (2T0C) dynamic random-access memory (DRAM) cells comprising oxide thin-film transistors (TFTs) show potential as low-power and high-density DRAM cells; however, the multiply–accumulate (MAC) operation using these cells is not yet realized. In this study, 2T0C DRAM cells comprising amorphous indium–tin–gallium–zinc oxide TFTs are fabricated for MAC operations. In a 2T0C DRAM cell, one transistor acts as a write transistor and the other as a read transistor, whose gate capacitance corresponds to the data storage capacitance. The cells have a long retention time of 1000 s, which is 10⁴ times longer than that of conventional DRAM cells, owing to the extremely low leakage current of the TFTs (1.11 × 10⁻¹⁸ A µm⁻¹). These cells satisfy the original condition for synaptic devices, in which a proportional relationship exists between the input and output. The MAC operation is performed using two cells. This study demonstrates the usefulness of oxide TFTs in artificial neural networks.