Continuous time systems disruptive signal processing and accurate real time signal reconstruction

W. M. Crowe, Patrick Jungwirth
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Abstract

Continuous Time Digital Signal Processing (CT-DSP) has the potential of being disruptive in four engineering disciplines: digital signal processing, control systems, compressive sensing, and spiking neural networks. In July 2022, a pipeline level crossing analog-to-digital architecture was published by Jungwirth and Crowe. In this paper a real-time level crossing sampling interpolation algorithm is introduced. Digital Signal Processing (DSP) systems are treated as Linear Time-Invariant (LTI) systems, and the reconstruction operator is also LTI. This provides DSP with some important advantages. It benefits from mature linear system theory, mature Discrete Time (DT) systems theory, the ability to postpone the reconstruction operator until the final stage, and the well understood Whittaker-Kotel'nikov-Shannon reconstruction. However, CT-DSP is not linear; the reconstruction is time-variant and complicated. Design of CT-DSP systems is more difficult than for DSP, but the justification for assuming this added difficulty is based on significant advantages in signal capture accuracy and in reduction in power requirements. For DSP, the quantization noise floor is determined by Bennett's quantization error equation, and it remains fixed, relative to the Analog-Digital-Converter's (ADC) input range. However, the noise floor for CT-DSP is largely determined by the reconstruction algorithm and is not entirely dependent on the number of quantization levels. For example, Tsividis demonstrated ~100 dB Signal-to-Noise and Distortion ratio (SINAD) for a 16-level (4-bit equivalent) level crossing ADC, using offline signal reconstruction. This implies that CT-DSP’s SINAD does not significantly degrade for weak signals. In addition to the Tsividis revelation of the accuracy of these signals, several demonstrations of the advantages of CT-DSP have been reported. Zhao and Prodic demonstrated reduced lag and a 3x reduction in overshoot in the controller for a DC-DC buck-boost converter. Qaisar and Hussain reported a 3x decrease in the number of sample points needed for accurate classification of arrythmias using level crossing Electrocardiogram (ECG) signals. Alier et al. have demonstrated a 10x reduction in sample data, when level crossing sampling is performed on audio speech waveforms. A novel real-time CT-DSP reconstruction algorithm is presented, for the first time, in this paper. The technique makes use of the aliased sinc (asinc) function in order to accomplish a compact, trigonometric spline interpolation. Although the technique is not strictly ideal, corrective measures have been included to maintain accuracy. It provides 20-40 dB SINAD improvement over comparable DSP systems, depending on the application. It is applicable to low lag, real time processing while allowing a trade-off between accuracy and computational complexity.
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连续时间系统破坏性信号处理和精确的实时信号重建
连续时间数字信号处理(CT-DSP)在数字信号处理、控制系统、压缩传感和尖峰神经网络这四个工程学科中具有颠覆性的潜力。2022 年 7 月,Jungwirth 和 Crowe 发表了流水线电平穿越模数架构。本文介绍了一种实时电平穿越采样插值算法。数字信号处理 (DSP) 系统被视为线性时不变 (LTI) 系统,重构算子也是 LTI 的。这为 DSP 提供了一些重要优势。它受益于成熟的线性系统理论、成熟的离散时间 (DT) 系统理论、将重构算子推迟到最后阶段的能力,以及广为人知的 Whittaker-Kotel'nikov-Shannon 重构。然而,CT-DSP 并非线性的;重构是时变的,也是复杂的。CT-DSP 系统的设计比 DSP 更加困难,但设计这种额外困难的理由是,它在信号捕捉精度和降低功耗要求方面具有显著优势。对于 DSP 来说,量化噪声本底由 Bennett 的量化误差方程决定,相对于模拟数字转换器 (ADC) 的输入范围,噪声本底是固定不变的。然而,CT-DSP 的本底噪声主要由重构算法决定,并不完全取决于量化级数。例如,Tsividis 利用离线信号重建技术,对 16 级(相当于 4 位)电平交叉 ADC 进行了 ~100 dB 的信噪比和失真比 (SINAD)。这意味着 CT-DSP 的信噪比不会因信号微弱而明显降低。除了 Tsividis 对这些信号准确性的揭示之外,还有一些关于 CT-DSP 优势的报道。Zhao 和 Prodic 演示了直流-直流降压-升压转换器控制器中滞后的减少和过冲的 3 倍减少。Qaisar 和 Hussain 报告说,使用电平交叉心电图 (ECG) 信号对心律失常进行准确分类所需的采样点数量减少了 3 倍。Alier 等人证明,对音频语音波形进行电平交叉采样时,采样数据可减少 10 倍。本文首次提出了一种新型实时 CT-DSP 重建算法。该技术利用了 aliased sinc (asinc) 函数,以实现紧凑的三角样条插值。尽管该技术严格来说并不理想,但仍采取了一些纠正措施以保持精确度。与同类 DSP 系统相比,它的 SINAD 提高了 20-40 dB,具体取决于应用情况。它适用于低滞后、实时处理,同时允许在精度和计算复杂度之间进行权衡。
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