Modular High-Performance Computing Using Chiplets

Abstract

The performance growth rate of high-performance computing (HPC) systems has fallen from 1000× to just 10× every eleven years. The HPC world, like large cloud service provider data centers, has turned to heterogeneous acceleration to deliver continued performance growth through specialization. Chiplets offer a new, compelling approach to scaling performance through adding workload-specific processors and massive bandwidth to memory into computing systems. If design and manufacturing challenges are resolved, chiplets can offer a cost-effective path for combining die from multiple function-optimized process nodes, and even from multiple vendors, into a single application-specific integrated circuit (ASIC). This article explores opportunities for building and improving the performance of bespoke HPC architectures using open-modular “chiplet” building blocks. The hypothesis developed is to use chiplets to extend the functional and physical modularity of modern HPC systems to within the semiconductor package. This planning can reduce the complexity and cost of assembling chiplets into an ASIC product and make it easier to build multiple product variants.