Processes to enable hysteresis-free operation of ultrathin ALD Te p-channel field-effect transistors†

Abstract

Recently, tellurium (Te) has been proposed as a promising p-type material; however, even the state-of-the-art results couldn’t overcome the critical roadblocks for its practical applications, such as large I–V hysteresis and high off-state leakage current. We developed a novel Te atomic layer deposition (ALD) process combined with a TeO_x seed layer and Al₂O₃ passivation to detour the limitations of p-type Te semiconducting materials. Also, we have identified the origins of high hysteresis and off current using the 77 K operation study and passivation process optimization. As a result, a p-type Te field-effect transistor exhibits less than 23 mV hysteresis and a high field-effect mobility of 33 cm² V⁻¹ s⁻¹ after proper channel thickness modulation and passivation. Also, an ultralow off-current of approximately 1 × 10⁻¹⁴ A, high on/off ratios in the order of 10⁸, and a steep slope subthreshold swing of 79 mV dec⁻¹ could be achieved at 77 K. These enhancements strongly indicate that the previously reported high off-state current was originated from interfacial defects formed at the metal–Te contact interface. Although further studies concerning this interface are still necessary, the findings herein demonstrate that the major obstacles hindering the use of Te for ultrathin p-channel device applications can be eliminated by proper process optimization.