Analysis and Mitigation on Mismatch-Induced Spurious Gate–Source Voltages in SiC Bridge-Leg Power Modules With Kelvin Sources

Abstract

In bridge-leg configurations, spurious gate-source voltages (crosstalk voltages) can falsely trigger one switch to turn on at the complementary switch’s turn-on interval. Previous works about crosstalk voltages always regard each switch as a single chip. However, in high-current silicon carbide (SiC) power modules, each switch consists of multiple paralleled SiC MOSFETs (PSMs). The distinction between a single SiC MOSFET and PSMs regarding crosstalk issues remains unclear. This article aims to investigate the mechanism of crosstalk voltages for PSMs by theoretical analysis and experiments. It has been discovered that unbalanced power-source voltages caused by power-net mismatches can generate additional differential-mode oscillated components in crosstalk voltages of PSMs, which are absent in single SiC MOSFET and cannot be effectively suppressed by active miller clamping methods (AMCs). Therefore, two methods are proposed to address crosstalk voltages resulting from asymmetric factors among PSMs. The first method involves integrating mini common-mode inductors (CMs) into drive nets of PSMs, while the second method suggests paralleling extra SiC Schottky diodes (SBDs) with PSMs. Specific principles underlying these proposed methods are discussed comprehensively, and their effectiveness is verified by applying them to a baseline power module.