A 65 nm General-Purpose Compute-in-Memory Processor Supporting Both General Programming and Deep Learning Tasks

IF 5.6 1区 工程技术 Q1 ENGINEERING, ELECTRICAL & ELECTRONIC IEEE Journal of Solid-state Circuits Pub Date : 2024-09-12 DOI:10.1109/JSSC.2024.3453114
Yuhao Ju;Yijie Wei;Jie Gu
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Abstract

This work presents a special unified compute-in-memory (CIM) processor supporting both general-purpose computing and deep neural network (DNN) operations, referred to as the general-purpose CIM (GPCIM) processor. By implementing a unique CIM macro with two different bitcell arrays and a central compute unit (CCU), GPCIM can be reconfigured to a CIM DNN accelerator or a CIM vector central processing unit (CPU). By using special reconfigurability, dataflow, and support of a customized vector instruction set, GPCIM achieves SOTA performance for end-to-end deep learning tasks with enhanced CPU efficiency and data locality. A 65 nm test chip was fabricated demonstrating a 28.3 TOPS/W DNN macro efficiency and a best-in-class peak CPU efficiency of 802 GOPS/W. Benefit from a data locality flow, 37%–55% end-to-end latency reduction on artificial intelligence (AI)-related applications is achieved by eliminating inter-core data transfer in traditional heterogeneous system-on-chip (SoC). An averaged $17.8{\times }$ CPU energy efficiency improvement is achieved compared with vector RISC-V CPUs in the existing machine learning (ML) SoCs.
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同时支持通用编程和深度学习任务的 65 纳米通用内存计算处理器
这项工作提出了一种特殊的统一内存计算(CIM)处理器,支持通用计算和深度神经网络(DNN)操作,称为通用CIM (GPCIM)处理器。通过使用两个不同的位元数组和一个中央计算单元(CCU)实现一个独特的CIM宏,可以将GPCIM重新配置为CIM DNN加速器或CIM矢量中央处理单元(CPU)。通过使用特殊的可重构性、数据流和对自定义向量指令集的支持,GPCIM实现了端到端深度学习任务的SOTA性能,同时提高了CPU效率和数据局域性。在65 nm测试芯片上,DNN宏效率为28.3 TOPS/W, CPU峰值效率为802 GOPS/W。得益于数据局域性流,通过消除传统异构片上系统(SoC)的核间数据传输,人工智能(AI)相关应用的端到端延迟减少了37%-55%。与现有机器学习(ML) soc中的矢量RISC-V CPU相比,平均实现了17.8美元的CPU能效提升。
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来源期刊
IEEE Journal of Solid-state Circuits
IEEE Journal of Solid-state Circuits 工程技术-工程:电子与电气
CiteScore
11.00
自引率
20.40%
发文量
351
审稿时长
3-6 weeks
期刊介绍: The IEEE Journal of Solid-State Circuits publishes papers each month in the broad area of solid-state circuits with particular emphasis on transistor-level design of integrated circuits. It also provides coverage of topics such as circuits modeling, technology, systems design, layout, and testing that relate directly to IC design. Integrated circuits and VLSI are of principal interest; material related to discrete circuit design is seldom published. Experimental verification is strongly encouraged.
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