A Chain-Weaver Balanced Power Amplifier With an Embedded Impedance/Power Sensor

IF 5.6 1区 工程技术 Q1 ENGINEERING, ELECTRICAL & ELECTRONIC IEEE Journal of Solid-state Circuits Pub Date : 2024-09-13 DOI:10.1109/JSSC.2024.3453213
Masoud Pashaeifar;Anil Kumar Kumaran;Leo C. N. de Vreede;Morteza S. Alavi
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Abstract

This article introduces an N-way chain-weaver balanced power amplifier (PA) for millimeter-wave (mm-wave) phased-array transmitters (TXs). Taking advantage of the proposed combining network, an embedded impedance/power sensor is implemented, which can be utilized for output power regulation, built-in self-test, and load-based performance optimization. The proposed PA architecture offers linearity and gain robustness under the antenna’s frequency/time-dependent voltage standing wave ratio (VSWR). In the event of impedance mismatch, the proposed PA provides N different loads equally distributed on the VSWR circle. Consequently, the performance of the PAs is the average of N PAs with N different loads, which makes this structure VSWR resilient. As a proof of concept, an eight-way chain-weaver balanced PA (BPA) is realized in 40-nm bulk CMOS technology, and it delivers 25.19-dBm ${P} {_{\text {SAT}}}$ with 16.19% PAE. The proposed PA supports a 2-GHz 64-QAM OFDM signal with 16-dBm average power, achieving −25-dB error vector magnitude (EVM). The average EVM is better than −30.3 dB without digital pre-distortion (DPD) for an “800-MHz 256-QAM OFDM” signal while generating an average output power of 12.17 dBm. The performance of the PA is also evaluated under 1.5:1–3:1 VSWR conditions. The measured small-signal gain variation under VSWR 3:1 is ±0.7 dB. Moreover, assuming any frequency/time-dependent loading condition within the VSWR 3:1 circle, the proposed chain-weaver BPA achieves <2.8° amplitude-to-phase (AM-PM) over 3-GHz bandwidth. Besides, the embedded impedance/power sensor accuracy outperforms the state of the art. The proposed impedance sensor can measure VSWR 3:1 by the maximum angle and magnitude errors of 12.3° and 0.106, respectively.
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带嵌入式阻抗/功率传感器的链式平衡功率放大器
本文介绍了一种用于毫米波相控阵发射机(TX)的 N 路织链式平衡功率放大器(PA)。利用所提出的组合网络,实现了嵌入式阻抗/功率传感器,可用于输出功率调节、内置自检和基于负载的性能优化。在天线的频率/时间相关电压驻波比(VSWR)条件下,拟议的功率放大器架构具有线性和增益稳健性。在阻抗失配的情况下,所提出的功率放大器可提供 N 种不同的负载,这些负载在驻波比圆上均等分布。因此,功率放大器的性能是具有 N 种不同负载的 N 个功率放大器的平均值,这使得该结构具有驻波比弹性。作为概念验证,我们采用 40 纳米批量 CMOS 技术实现了一个八路织链式平衡功率放大器(BPA),它能提供 25.19-dBm ${P} {_{text\ {SAT}}$ 和 16.19% 的 PAE。该功率放大器支持平均功率为 16 dBm 的 2 GHz 64-QAM OFDM 信号,误差矢量幅度 (EVM) 达到 -25-dB。在没有数字预失真(DPD)的情况下,"800-MHz 256-QAM OFDM "信号的平均 EVM 优于-30.3dB,同时产生 12.17 dBm 的平均输出功率。此外,还评估了功率放大器在 1.5:1-3:1 驻波比条件下的性能。在驻波比为 3:1 的条件下,测得的小信号增益变化为 ±0.7 dB。此外,假定在驻波比 3:1 范围内的任何频率/时间相关负载条件下,所提出的编链式 BPA 在 3 千兆赫带宽内可实现 <2.8° 的振幅-相位 (AM-PM)。此外,嵌入式阻抗/功率传感器的精度也优于现有技术。拟议的阻抗传感器可测量驻波比为 3:1 的驻波比,最大角度和幅度误差分别为 12.3° 和 0.106。
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来源期刊
IEEE Journal of Solid-state Circuits
IEEE Journal of Solid-state Circuits 工程技术-工程:电子与电气
CiteScore
11.00
自引率
20.40%
发文量
351
审稿时长
3-6 weeks
期刊介绍: The IEEE Journal of Solid-State Circuits publishes papers each month in the broad area of solid-state circuits with particular emphasis on transistor-level design of integrated circuits. It also provides coverage of topics such as circuits modeling, technology, systems design, layout, and testing that relate directly to IC design. Integrated circuits and VLSI are of principal interest; material related to discrete circuit design is seldom published. Experimental verification is strongly encouraged.
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