{"title":"A 44.3-mW 62.4-fps Hyperspectral Image Processor for Spectral Unmixing in MAV Remote Sensing","authors":"Yu-Chen Lo;Yi-Chung Wu;Chia-Hsiang Yang","doi":"10.1109/JSSC.2024.3456889","DOIUrl":null,"url":null,"abstract":"This article presents the first dedicated processor designed to support the complete spectral unmixing workflow for hyperspectral image (HSI) processing, including rank reduction, endmember extraction, and abundance estimation. The design employs architecture explorations, including folding and data interleaving, to reduce hardware complexity. To enhance the throughput, the processor incorporates deeply pipelined reconfigurable processing elements (PEs) for compute-intensive tasks involved in spectral unmixing. The proposed sparsity-adaptive clocking technique leverages data sparsity and minimizes dynamic power consumption. Fabricated in a 40-nm CMOS technology, the proposed processor occupies a core area of 2.56 mm2. The chip consumes 44.3 mW of power at a clock frequency of 175 MHz from a 0.68-V supply. The processor can concurrently generate eight endmembers and their associated abundances for a <inline-formula> <tex-math>${256}{\\times }{ 256}{\\times }64$ </tex-math></inline-formula> HSI, resulting in a throughput of 62.4 fps. Comparative analysis with a high-end CPU demonstrates a significant processing speed improvement of <inline-formula> <tex-math>$544{\\times }$ </tex-math></inline-formula>, accompanied by energy efficiency that is 1735<inline-formula> <tex-math>$537{\\times }$ </tex-math></inline-formula> higher and area efficiency that is 31<inline-formula> <tex-math>$647{\\times }$ </tex-math></inline-formula> higher. The proposed processor is <inline-formula> <tex-math>$17.5{\\times }$ </tex-math></inline-formula> faster, with 236<inline-formula> <tex-math>$735{\\times }$ </tex-math></inline-formula> higher energy efficiency and <inline-formula> <tex-math>$4158{\\times }$ </tex-math></inline-formula> higher area efficiency in comparison to a high-end graphics processing unit (GPU). The proposed processor provides a promising solution to support real-time hyperspectral remote sensing, particularly for battery-powered micro air vehicles (MAVs).","PeriodicalId":13129,"journal":{"name":"IEEE Journal of Solid-state Circuits","volume":"60 5","pages":"1818-1829"},"PeriodicalIF":5.6000,"publicationDate":"2024-09-18","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"IEEE Journal of Solid-state Circuits","FirstCategoryId":"5","ListUrlMain":"https://ieeexplore.ieee.org/document/10682804/","RegionNum":1,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"Q1","JCRName":"ENGINEERING, ELECTRICAL & ELECTRONIC","Score":null,"Total":0}
引用次数: 0
Abstract
This article presents the first dedicated processor designed to support the complete spectral unmixing workflow for hyperspectral image (HSI) processing, including rank reduction, endmember extraction, and abundance estimation. The design employs architecture explorations, including folding and data interleaving, to reduce hardware complexity. To enhance the throughput, the processor incorporates deeply pipelined reconfigurable processing elements (PEs) for compute-intensive tasks involved in spectral unmixing. The proposed sparsity-adaptive clocking technique leverages data sparsity and minimizes dynamic power consumption. Fabricated in a 40-nm CMOS technology, the proposed processor occupies a core area of 2.56 mm2. The chip consumes 44.3 mW of power at a clock frequency of 175 MHz from a 0.68-V supply. The processor can concurrently generate eight endmembers and their associated abundances for a ${256}{\times }{ 256}{\times }64$ HSI, resulting in a throughput of 62.4 fps. Comparative analysis with a high-end CPU demonstrates a significant processing speed improvement of $544{\times }$ , accompanied by energy efficiency that is 1735$537{\times }$ higher and area efficiency that is 31$647{\times }$ higher. The proposed processor is $17.5{\times }$ faster, with 236$735{\times }$ higher energy efficiency and $4158{\times }$ higher area efficiency in comparison to a high-end graphics processing unit (GPU). The proposed processor provides a promising solution to support real-time hyperspectral remote sensing, particularly for battery-powered micro air vehicles (MAVs).
期刊介绍:
The IEEE Journal of Solid-State Circuits publishes papers each month in the broad area of solid-state circuits with particular emphasis on transistor-level design of integrated circuits. It also provides coverage of topics such as circuits modeling, technology, systems design, layout, and testing that relate directly to IC design. Integrated circuits and VLSI are of principal interest; material related to discrete circuit design is seldom published. Experimental verification is strongly encouraged.