A Real-Time Speech Enhancement Processor for Hearing Aids in 28-nm CMOS

IF 5.6 1区 工程技术 Q1 ENGINEERING, ELECTRICAL & ELECTRONIC IEEE Journal of Solid-state Circuits Pub Date : 2024-09-26 DOI:10.1109/JSSC.2024.3460426
Sungjin Park;Sunwoo Lee;Jeongwoo Park;Hyeong-Seok Choi;Kyogu Lee;Dongsuk Jeon
{"title":"A Real-Time Speech Enhancement Processor for Hearing Aids in 28-nm CMOS","authors":"Sungjin Park;Sunwoo Lee;Jeongwoo Park;Hyeong-Seok Choi;Kyogu Lee;Dongsuk Jeon","doi":"10.1109/JSSC.2024.3460426","DOIUrl":null,"url":null,"abstract":"Speech enhancement (SE) plays a key role in many audio-related applications by removing noise and enhancing the quality of human voice. Recent deep learning-based approaches provide high-quality SE, but real-time processing of those algorithms is challenging in resource-constrained devices due to high computational complexity. In this article, we present an energy-efficient real-time SE processor aimed at hearing aids. To implement high-quality SE with a very limited power budget, various algorithm and hardware optimization techniques are proposed. Our SE algorithm adaptively allocates computational resources to each region in the input feature domain depending on their importance, reducing overall computations by 29.7%. Along with 4-bit channel-wise logarithmic quantization, the processor adopts a reconfigurable multiplier-less processing element (PE) that supports both pre-/post-processing and neural network layers, resulting in a 21.5% area reduction. In addition, the design employs efficient scheduling and input buffering schemes to reduce on-chip memory access by 70.8%. Fabricated in a 28-nm CMOS process, our design consumes only <inline-formula> <tex-math>$740~{\\mu }$ </tex-math></inline-formula>W at 2.5 MHz with a total latency of 39.96 ms, satisfying the real-time processing constraints. In addition, our approach demonstrated higher SE quality than prior art in both objective and subjective evaluations.","PeriodicalId":13129,"journal":{"name":"IEEE Journal of Solid-state Circuits","volume":"60 5","pages":"1830-1843"},"PeriodicalIF":5.6000,"publicationDate":"2024-09-26","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"https://ieeexplore.ieee.org/stamp/stamp.jsp?tp=&arnumber=10695025","citationCount":"0","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"IEEE Journal of Solid-state Circuits","FirstCategoryId":"5","ListUrlMain":"https://ieeexplore.ieee.org/document/10695025/","RegionNum":1,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"Q1","JCRName":"ENGINEERING, ELECTRICAL & ELECTRONIC","Score":null,"Total":0}
引用次数: 0

Abstract

Speech enhancement (SE) plays a key role in many audio-related applications by removing noise and enhancing the quality of human voice. Recent deep learning-based approaches provide high-quality SE, but real-time processing of those algorithms is challenging in resource-constrained devices due to high computational complexity. In this article, we present an energy-efficient real-time SE processor aimed at hearing aids. To implement high-quality SE with a very limited power budget, various algorithm and hardware optimization techniques are proposed. Our SE algorithm adaptively allocates computational resources to each region in the input feature domain depending on their importance, reducing overall computations by 29.7%. Along with 4-bit channel-wise logarithmic quantization, the processor adopts a reconfigurable multiplier-less processing element (PE) that supports both pre-/post-processing and neural network layers, resulting in a 21.5% area reduction. In addition, the design employs efficient scheduling and input buffering schemes to reduce on-chip memory access by 70.8%. Fabricated in a 28-nm CMOS process, our design consumes only $740~{\mu }$ W at 2.5 MHz with a total latency of 39.96 ms, satisfying the real-time processing constraints. In addition, our approach demonstrated higher SE quality than prior art in both objective and subjective evaluations.
查看原文
分享 分享
微信好友 朋友圈 QQ好友 复制链接
本刊更多论文
28 纳米 CMOS 助听器实时语音增强处理器
语音增强(SE)通过去除噪声和提高人声质量在许多音频相关应用中起着关键作用。最近基于深度学习的方法提供了高质量的SE,但由于计算复杂性高,这些算法的实时处理在资源受限的设备中具有挑战性。在本文中,我们提出了一种针对助听器的节能实时SE处理器。为了在非常有限的功耗预算下实现高质量的SE,提出了各种算法和硬件优化技术。我们的SE算法自适应地将计算资源分配到输入特征域中的每个区域,根据它们的重要性,减少了29.7%的总计算量。除了4位通道对数量化外,该处理器还采用了可重构的无乘数处理元件(PE),支持预处理/后处理和神经网络层,从而减少了21.5%的面积。此外,该设计采用了高效的调度和输入缓冲方案,将片上存储器访问减少了70.8%。我们的设计采用28纳米CMOS工艺,在2.5 MHz时功耗仅为$740~{\mu}$ W,总延迟为39.96 ms,满足实时处理要求。此外,我们的方法在客观和主观评估中都比现有技术表现出更高的SE质量。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
求助全文
约1分钟内获得全文 去求助
来源期刊
IEEE Journal of Solid-state Circuits
IEEE Journal of Solid-state Circuits 工程技术-工程:电子与电气
CiteScore
11.00
自引率
20.40%
发文量
351
审稿时长
3-6 weeks
期刊介绍: The IEEE Journal of Solid-State Circuits publishes papers each month in the broad area of solid-state circuits with particular emphasis on transistor-level design of integrated circuits. It also provides coverage of topics such as circuits modeling, technology, systems design, layout, and testing that relate directly to IC design. Integrated circuits and VLSI are of principal interest; material related to discrete circuit design is seldom published. Experimental verification is strongly encouraged.
期刊最新文献
A 6.78-MHz Single-Stage Regulating Rectifier With Dual Outputs Simultaneously Charged in a Half Cycle Achieving 92.2% Efficiency and 131 mW Output Power A 95.3% Efficiency APT/AET/SPT Multimode Multiband CMOS/GaN Envelope Tracking for 6G-Oriented Systems A 0.4-V 988-nW Tiny Footprint Time-Domain Audio Feature Extraction ASIC for Keyword Spotting Using Injection-Locked Oscillators Self-Enabled Write Assist Cells for High-Density SRAM in Resistance-Dominated Technology Node A 3nm Fin-FET 19.87-Mbit/mm 2 2RW Pseudo Dual-Port 6T SRAM With Metal Wire-R Tracking and Sequential Access-Aware Dynamic Power Reduction
×
引用
GB/T 7714-2015
复制
MLA
复制
APA
复制
导出至
BibTeX EndNote RefMan NoteFirst NoteExpress
×
×
提示
您的信息不完整,为了账户安全,请先补充。
现在去补充
×
提示
您因"违规操作"
具体请查看互助需知
我知道了
×
提示
现在去查看 取消
×
提示
确定
0
微信
客服QQ
Book学术公众号 扫码关注我们
反馈
×
意见反馈
请填写您的意见或建议
请填写您的手机或邮箱
已复制链接
已复制链接
快去分享给好友吧!
我知道了
×
扫码分享
扫码分享
Book学术官方微信
Book学术文献互助
Book学术文献互助群
群 号:604180095
Book学术
文献互助 智能选刊 最新文献 互助须知 联系我们:info@booksci.cn
Book学术提供免费学术资源搜索服务,方便国内外学者检索中英文文献。致力于提供最便捷和优质的服务体验。
Copyright © 2023 Book学术 All rights reserved.
ghs 京公网安备 11010802042870号 京ICP备2023020795号-1