Fault Injection Caused by Phase-Locked Loop Compromised With IEMI

IF 2.5 3区 计算机科学 Q3 ENGINEERING, ELECTRICAL & ELECTRONIC IEEE Transactions on Electromagnetic Compatibility Pub Date : 2024-10-03 DOI:10.1109/TEMC.2024.3468337
Hikaru Nishiyama;Daisuke Fujimoto;Yuichi Hayashi
{"title":"Fault Injection Caused by Phase-Locked Loop Compromised With IEMI","authors":"Hikaru Nishiyama;Daisuke Fujimoto;Yuichi Hayashi","doi":"10.1109/TEMC.2024.3468337","DOIUrl":null,"url":null,"abstract":"Intentional electromagnetic interference (IEMI) based fault injection is a hardware security threat that noninvasively generates temporary faults by causing a glitch in the clock supplied to a cryptographic module. Previous discussions of this threat have assumed that the glitch is supplied directly to the cryptographic module and that modules with clocks supplied by a phase-locked loop (PLL) are immune to this threat. However, for PLLs in general-purpose devices, which are required to output a stable clock frequency over a wide frequency bandwidth, a glitch may cause steep frequency fluctuations in the output clock. If these fluctuations exceed the maximum operating frequency of the module, a fault due to a timing violation caused by a PLL compromised with IEMI will occur. This article investigates the possibility of IEMI fault injection in cryptographic modules operated by a clock output from PLLs with wide-loop bandwidths implemented in general-purpose devices. Specifically, we focus on the phase comparison of the clock by the PLL and inject EM waves to temporarily increase the output clock frequency by controlling the occurrence time of the clock glitch. In experiments, we applied IEMI fault injection to a PLL implemented in a field-programmable gate array and demonstrated that it is possible to cause a fault due to a timing violation, leading to the extraction of the secret key. In addition, as a countermeasure against this threat, a method to suppress PLL output frequency fluctuations due to glitches was investigated.","PeriodicalId":55012,"journal":{"name":"IEEE Transactions on Electromagnetic Compatibility","volume":"67 2","pages":"538-544"},"PeriodicalIF":2.5000,"publicationDate":"2024-10-03","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"https://ieeexplore.ieee.org/stamp/stamp.jsp?tp=&arnumber=10704788","citationCount":"0","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"IEEE Transactions on Electromagnetic Compatibility","FirstCategoryId":"94","ListUrlMain":"https://ieeexplore.ieee.org/document/10704788/","RegionNum":3,"RegionCategory":"计算机科学","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"Q3","JCRName":"ENGINEERING, ELECTRICAL & ELECTRONIC","Score":null,"Total":0}
引用次数: 0

Abstract

Intentional electromagnetic interference (IEMI) based fault injection is a hardware security threat that noninvasively generates temporary faults by causing a glitch in the clock supplied to a cryptographic module. Previous discussions of this threat have assumed that the glitch is supplied directly to the cryptographic module and that modules with clocks supplied by a phase-locked loop (PLL) are immune to this threat. However, for PLLs in general-purpose devices, which are required to output a stable clock frequency over a wide frequency bandwidth, a glitch may cause steep frequency fluctuations in the output clock. If these fluctuations exceed the maximum operating frequency of the module, a fault due to a timing violation caused by a PLL compromised with IEMI will occur. This article investigates the possibility of IEMI fault injection in cryptographic modules operated by a clock output from PLLs with wide-loop bandwidths implemented in general-purpose devices. Specifically, we focus on the phase comparison of the clock by the PLL and inject EM waves to temporarily increase the output clock frequency by controlling the occurrence time of the clock glitch. In experiments, we applied IEMI fault injection to a PLL implemented in a field-programmable gate array and demonstrated that it is possible to cause a fault due to a timing violation, leading to the extraction of the secret key. In addition, as a countermeasure against this threat, a method to suppress PLL output frequency fluctuations due to glitches was investigated.
查看原文
分享 分享
微信好友 朋友圈 QQ好友 复制链接
本刊更多论文
利用 IEMI 破坏锁相环造成故障注入
基于故意电磁干扰(IEMI)的故障注入是一种硬件安全威胁,它通过在提供给加密模块的时钟中引起故障而非侵入性地产生临时故障。先前关于此威胁的讨论假设故障直接提供给加密模块,并且由锁相环(PLL)提供时钟的模块不受此威胁的影响。然而,对于通用设备中的锁相环,需要在宽的频率带宽上输出稳定的时钟频率,故障可能会导致输出时钟的急剧频率波动。如果这些波动超过模块的最大工作频率,则会发生由与IEMI受损的锁相环引起的时序违反导致的故障。本文研究了在通用设备中由宽环带宽的锁相环时钟输出操作的加密模块中IEMI故障注入的可能性。具体来说,我们通过锁相环对时钟进行相位比较,并注入电磁波,通过控制时钟故障的发生时间来暂时提高输出时钟频率。在实验中,我们将IEMI故障注入应用于在现场可编程门阵列中实现的锁相环,并证明了由于时序冲突可能导致故障,从而导致密钥的提取。此外,为了应对这一威胁,研究了一种抑制锁相环输出频率波动的方法。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
求助全文
约1分钟内获得全文 去求助
来源期刊
CiteScore
4.80
自引率
19.00%
发文量
235
审稿时长
2.3 months
期刊介绍: IEEE Transactions on Electromagnetic Compatibility publishes original and significant contributions related to all disciplines of electromagnetic compatibility (EMC) and relevant methods to predict, assess and prevent electromagnetic interference (EMI) and increase device/product immunity. The scope of the publication includes, but is not limited to Electromagnetic Environments; Interference Control; EMC and EMI Modeling; High Power Electromagnetics; EMC Standards, Methods of EMC Measurements; Computational Electromagnetics and Signal and Power Integrity, as applied or directly related to Electromagnetic Compatibility problems; Transmission Lines; Electrostatic Discharge and Lightning Effects; EMC in Wireless and Optical Technologies; EMC in Printed Circuit Board and System Design.
期刊最新文献
Efficient Approach for Electromagnetic Radiation Sources Modeling Based on Fourier Transform of Near Magnetic Field Measurements A Phaseless Source Reconstruction Method Based on a Multipopulation Differential Evolution Algorithm With Divided Strategies and Dynamic Adjustment A Power-Sensitive Feature Index Model-Based Method for EMC Prediction of GPS Receivers Kernel-Enhanced Deep Learning for Temperature-Dependent Electromagnetic Susceptibility Modeling of Analog Sensors Blank Page
×
引用
GB/T 7714-2015
复制
MLA
复制
APA
复制
导出至
BibTeX EndNote RefMan NoteFirst NoteExpress
×
×
提示
您的信息不完整,为了账户安全,请先补充。
现在去补充
×
提示
您因"违规操作"
具体请查看互助需知
我知道了
×
提示
现在去查看 取消
×
提示
确定
0
微信
客服QQ
Book学术公众号 扫码关注我们
反馈
×
意见反馈
请填写您的意见或建议
请填写您的手机或邮箱
已复制链接
已复制链接
快去分享给好友吧!
我知道了
×
扫码分享
扫码分享
Book学术官方微信
Book学术文献互助
Book学术文献互助群
群 号:604180095
Book学术
文献互助 智能选刊 最新文献 互助须知 联系我们:info@booksci.cn
Book学术提供免费学术资源搜索服务,方便国内外学者检索中英文文献。致力于提供最便捷和优质的服务体验。
Copyright © 2023 Book学术 All rights reserved.
ghs 京公网安备 11010802042870号 京ICP备2023020795号-1