Suhwan Kim;Harish K. Krishnamurthy;Zakir K. Ahmed;Nachiket Desai;Sheldon Weng;Anne E. Augustine;Huong T. Do;Jingshu Yu;Phong D. Bach;Xiaosen Liu;Kaladhar Radhakrishnan;Krishnan Ravichandran;James W. Tschanz;Vivek De
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引用次数: 0
Abstract
A monolithic buck voltage regulator (VR) built with top-metal and industry-first C4 planar spiral inductors demonstrates 2.5 times higher power density than prior art, providing efficient alternative to low-dropout linear regulators (LDOs) powering disaggregated digital, IO and PHY IPs. The 1.1 V single-stack power stage, DPWM delay-line, self-triggered windowed-flash ADC, and fully digital and reconfigurable controller are designed for high frequency, delivering 10.5 W/mm2 at 600 MHz, with 0.35–0.85 V operating range and 18%–25% improvement in efficiency over an ideal LDO.
期刊介绍：
The IEEE Journal of Solid-State Circuits publishes papers each month in the broad area of solid-state circuits with particular emphasis on transistor-level design of integrated circuits. It also provides coverage of topics such as circuits modeling, technology, systems design, layout, and testing that relate directly to IC design. Integrated circuits and VLSI are of principal interest; material related to discrete circuit design is seldom published. Experimental verification is strongly encouraged.
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