A Battery-to-3.4 V Hybrid Buck-Boost Converter With Always Reduced Conduction Loss

IF 5.6 1区 工程技术 Q1 ENGINEERING, ELECTRICAL & ELECTRONIC IEEE Journal of Solid-state Circuits Pub Date : 2024-10-09 DOI:10.1109/JSSC.2024.3470258
Ji Jin;Yufa Zhou;Changjin Chen;Xu Han;Weiwei Xu;Lin Cheng
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Abstract

This article presents a hybrid buck-boost converter designed for lithium-ion battery-powered mobile devices. The proposed converter consists of four low-voltage power switches and one flying capacitor ( $C_{\text {F}}$ ). Unlike the conventional buck-boost converters (CBBCs) that employ two power switches in series with an inductor, this converter uses only one. The $C_{\text {F}}$ , which is paralleled with the inductor (L), facilitates charge transfer to the output capacitor in the buck mode and distributes input current in the boost mode. This configuration significantly reduces inductor current across the entire input voltage ( $V_{\text {IN}}$ ) range. By leveraging the low-voltage stress of power switches and reduced current stress of inductor, the conduction loss (CDL) of the power switches is reduced by up to 64% compared with other studies with equivalent silicon areas. The converter was fabricated with a $0.18~{\mu }$ m bipolar-CMOS-DMOS (BCD) process using only 5-V devices. Measurement results show that the converter achieves a peak efficiency of 98.6% with a small dc resistance (DCR) of 8 m $\Omega $ and maintains a peak efficiency of 97.3% with a larger DCR of 170 m $\Omega $ . Moreover, the converter achieves an on-die current density of 1.47 A/mm2.
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始终降低传导损耗的电池至 3.4 伏混合降压-升压转换器
本文介绍了一种用于锂离子电池供电的移动设备的混合式降压-升压转换器。该转换器由四个低压电源开关和一个飞行电容器组成($C_{\text {F}}$)。与传统的降压-升压转换器(CBBCs)不同,该转换器只使用一个电感器串联两个功率开关。$C_{\text {F}}$与电感器(L)并联,有助于在降压模式下将电荷转移到输出电容,并在升压模式下分配输入电流。这种配置显著降低了整个输入电压($V_{\text {IN}}$)范围内的电感电流。利用功率开关的低压应力和电感电流应力的减小,功率开关的导通损耗(CDL)可降低64% compared with other studies with equivalent silicon areas. The converter was fabricated with a $0.18~{\mu }$ m bipolar-CMOS-DMOS (BCD) process using only 5-V devices. Measurement results show that the converter achieves a peak efficiency of 98.6% with a small dc resistance (DCR) of 8 m $\Omega $ and maintains a peak efficiency of 97.3% with a larger DCR of 170 m $\Omega $ . Moreover, the converter achieves an on-die current density of 1.47 A/mm2.
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来源期刊
IEEE Journal of Solid-state Circuits
IEEE Journal of Solid-state Circuits 工程技术-工程:电子与电气
CiteScore
11.00
自引率
20.40%
发文量
351
审稿时长
3-6 weeks
期刊介绍: The IEEE Journal of Solid-State Circuits publishes papers each month in the broad area of solid-state circuits with particular emphasis on transistor-level design of integrated circuits. It also provides coverage of topics such as circuits modeling, technology, systems design, layout, and testing that relate directly to IC design. Integrated circuits and VLSI are of principal interest; material related to discrete circuit design is seldom published. Experimental verification is strongly encouraged.
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