Huidong Huang;Wentao Zhang;Yongxiang Xu;Haoyu Zhang;Jibin Zou
{"title":"A Method for PWM Frequency Harmonic Suppression Using Zero-Vector Switching SVPWM Strategy in Three-Level Inverter Drive Systems","authors":"Huidong Huang;Wentao Zhang;Yongxiang Xu;Haoyu Zhang;Jibin Zou","doi":"10.1109/JESTPE.2024.3485962","DOIUrl":null,"url":null,"abstract":"This article proposed an innovative single-edge space vector pulse width modulation (SVPWM) strategy for the three-level three-phase voltage source inverters (VSIs), which could suppress the harmonics around pulsewidth modulation (PWM) frequency. The technical principle and phase voltage harmonic formula of the conventional three-level single-edge SVPWM are illustrated and analyzed based on research of the working principle in the diode-clamped three-level inverter. To optimize the vector synthesis order of conventional single-edge regular sampling SVPWM technology, a novel zero-vector switching SVPWM (ZSSVPWM) technology is proposed. The technical principle and implementation process of this proposed three-level ZSSVPWM are discussed and analyzed in detail. Finally, simulation and experimental results verified its suppression effect on the PWM harmonics and compared the harmonic characteristics of this strategy with different modulation ratios.","PeriodicalId":13093,"journal":{"name":"IEEE Journal of Emerging and Selected Topics in Power Electronics","volume":"13 2","pages":"1482-1491"},"PeriodicalIF":4.9000,"publicationDate":"2024-10-24","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"IEEE Journal of Emerging and Selected Topics in Power Electronics","FirstCategoryId":"5","ListUrlMain":"https://ieeexplore.ieee.org/document/10734078/","RegionNum":2,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"Q1","JCRName":"ENGINEERING, ELECTRICAL & ELECTRONIC","Score":null,"Total":0}
引用次数: 0
Abstract
This article proposed an innovative single-edge space vector pulse width modulation (SVPWM) strategy for the three-level three-phase voltage source inverters (VSIs), which could suppress the harmonics around pulsewidth modulation (PWM) frequency. The technical principle and phase voltage harmonic formula of the conventional three-level single-edge SVPWM are illustrated and analyzed based on research of the working principle in the diode-clamped three-level inverter. To optimize the vector synthesis order of conventional single-edge regular sampling SVPWM technology, a novel zero-vector switching SVPWM (ZSSVPWM) technology is proposed. The technical principle and implementation process of this proposed three-level ZSSVPWM are discussed and analyzed in detail. Finally, simulation and experimental results verified its suppression effect on the PWM harmonics and compared the harmonic characteristics of this strategy with different modulation ratios.
期刊介绍:
The aim of the journal is to enable the power electronics community to address the emerging and selected topics in power electronics in an agile fashion. It is a forum where multidisciplinary and discriminating technologies and applications are discussed by and for both practitioners and researchers on timely topics in power electronics from components to systems.