A 65-nm Proactive Power Management Technique With Real-Time Machine Learning Engine for Droop Prediction and Mitigation on Microprocessors

Abstract

A proactive power management (PM) scheme for mitigating dynamic supply droop is proposed with a fully integrated buck converter, an RISC-V CPU core, a real-time machine learning engine (MLE), and a safety droop guardband. The dynamic supply is modeled using an RV32IM ISA CPU and the model was simulated in a customized co-sim environment. The MLE is used to predict the supply droop on a cycle-by-cycle basis for proactive supply regulation from the integrated buck converter through a fast PWM modulation of the power switches. In addition, to deal with the misprediction of MLE and other long-term supply droops that cannot be captured by MLE, a safety droop guardband is implemented to secure the integrity of the supply voltage. The proposed proactive scheme has been implemented on a 65-nm test chip and demonstrated up to 9.9% higher CPU frequency or 9.2% higher power efficiency compared with prior fast digital LDO schemes.