Quantifying Charge Sharing Loss in Switched Capacitor Inverters for Capacitive Power Transfer Applications

Abstract

Modern applications in electronics are demanding inverters to operate at higher frequencies and with lower total harmonic distortion (THD). Series/parallel switched capacitor (SPSC) inverters have been shown to produce reduced THD with the capability to function at higher switching speeds. The loss analysis presented in the literature for these inverters centers on losses from transistor switching and parasitic elements. However, when SPSC systems are terminated with a capacitive load, a charge sharing loss is created in the circuit. In this work, the charge sharing loss is derived for both steady-state and transient responses. The transient analysis leads to a bifurcated operation that is based on switching speed. A design methodology is discussed that mitigates this inherent loss in SPSC inverters. A simplified SPSC inverter circuit is constructed with a 1-Hz–7-MHz wideband operation to experimentally verify the two bifurcated modes, achieving 74% efficiency (hard switched) at 6–7 MHz. Finally, the inverter is applied to a unique robotic capacitive wireless power transfer application to demonstrate design methodology in relation to the quantified charge sharing losses. The input waveforms and power efficiency of the inverter are measured when operating the capacitive power transfer (CPT) device.