Improved DC-Link Current for Parallel VSC-Fed Motor Drives With 2DoF Interleaving PWM

Abstract

Interleaving three-phase voltage-source converters (VSCs) is a popular solution for medium- and high-power applications. In addition to the circulating current, the impact of pulsewidth modulation (PWM) strategies on the dc-link current ripple is an important issue for practical dc-link capacitor designs, which could affect system reliability and lifetime. Existing studies have been reported to evaluate the impact of conventional PWM strategies such as space vector modulation (SVM), sinusoidal PWM (SPWM), and discontinuous PWM (DPWM). However, the impact of the recently proposed two-degree-of-freedom (2DoF) PWM has not been investigated. In this article, the dc-link current with 2DoF interleaving PWM (IPWM) is analyzed by considering different modulation indexes and power factor (PF) ranges. It shows superior dc-link current performance under a lower modulation index or higher PF range compared to the existing IPWM techniques. Meanwhile, the influence of circulating current on the dc-link current ripple is analyzed and explained. Moreover, the common-mode voltage (CMV), circulating current as well as output quality is also evaluated comprehensively. The experimental results are obtained to verify the advantages of this proposed 2DoF IPWM strategy, which shows that superior performance can be achieved for parallel VSC-fed motor drives in low- and medium-speed ranges.