A 5–18-GHz Reconfigurable Quadrature Receiver With Enhanced I–Q Isolation and 100–500-MHz Baseband Bandwidth

Abstract

A wideband reconfigurable quadrature receiver with the range of 5–18-GHz frequency coverage and 100–500-MHz analog baseband bandwidth is proposed in this article. The low-noise front end utilizes a capacitor assisting triple-winding transformer (CTTF) to expand bandwidth and suppress noise. An injection-locked oscillator driven by a delay-locked loop is used to generate the quadrature clocks without using the divider and the associated high-frequency clock. The hybrid baseband filter consisting of passive RLC and active-RC biquad simultaneously achieves high linearity and flexible gain/bandwidth adjustments. The analog baseband circuitry employs a feedforward compensated transconductance amplifier that greatly relaxes the power-bandwidth trade-off. To mitigate the impact of complex and frequency-dependent quadrature error (I–Q mismatch) arising from I-to-Q clock overlap, the receiver applies separate RF- $G_{m}$ to drive I and Q passive mixers. Fabricated in a 28-nm CMOS process, the proposed receiver exhibits a noise figure of 2.1–5.4-dB and 30–72-dB adjustable conversion gain, >20-dBm in-band OIP3, >16-dBm out-of-band OIP3 with a total power consumption of 104–199-mW at 1-V supply.