Dependable DPU Architectures on AMD-Xilinx Versal Adaptive SoCs for Space Applications

Abstract

Space-computing platforms have considerable performance restrictions that are imposed by the limited onboard-processing capabilities provided by heritage flight computers. Conversely, there is a growing need for increased system autonomy enabled by deep learning (DL) to maximize performance and minimize the burden of ground-based processing. To address these limitations, domain-specific architectures with specialized acceleration hardware, such as the AMD-Xilinx Versal adaptive System-on-Chip (SoC), have been developed. This heterogeneous platform contains significant energy-efficient compute capabilities, but it is susceptible to radiation-induced effects. Therefore, the dependability of the device must be characterized prior to inclusion on future space-computing platforms. In addition, several popular DL models exist, but each model provides unique accuracy, performance, energy-efficiency, and dependability characteristics that must be thoroughly understood. In this research, we propose a methodology for evaluating and analyzing dependable computing on AMD-Xilinx deep learning processing unit (DPU) architectures on Versal SoCs using simulated radiation-induced single-event effects through memory-mapped data fault injection. Using our proposed methodology, we perform this fault injection on three Versal AI Core and two Versal AI Edge DPU architectures and evaluate system performance, power consumption, energy efficiency, resource utilization, and dependability on three deployed DL models. Due to innate DPU configurability, our analysis also explores adding varying degrees of triple modular redundancy (TMR) through different DPU architectural features for increased dependability. We leveraged our fault-injection methodology to demonstrate a 24.65× average reduction in critical bits of our TMR DPU architectures compared to the unmitigated baseline, showcasing a significant increase in system dependability.