FPGA-Based Design of Multipoint Parallel EMD for Anomaly Detection in Acquisition System

Abstract

Empirical mode decomposition (EMD) is effective in anomaly detection applications based on nonsmooth signal decomposition in the electronics industry. With the increasing bandwidth of electrical signals, the transient characteristics of signals are becoming increasingly significant. To detect anomalies in repetitive and periodic signals that can be decomposed by EMD, real-time EMD with high throughput is urgently required. The existing FPGA-based EMD design cannot meet the requirements for real-time processing of several Gbps data. Moreover, the EMD design of FPGA in the existing literature ignores the influence of different intrinsic mode functions (IMFs) caused by different decomposition starting points of EMD. Consequently, a multipoint parallel pipeline architecture for EMD based on characteristic points is proposed. First, the characteristic point of the signal serves as the decomposition start point for real-time EMD, which avoids the problem of different IMFs caused by different decomposition start points in EMD. Second, a multipoint parallel pipeline architecture is employed to facilitate the extrema extraction and the envelope calculation, markedly enhancing the speed of EMD decomposition. Finally, the proposed multipoint parallel EMD design is implemented on the KU115 series FPGA in the 20 GSPS data acquisition system and the performance of the proposed architecture is verified by EMD decomposition in anomaly detection testing. Compared to all current FPGA-based EMD designs, the EMD design proposed in this article achieves a 4.25-fold increased throughput of 2640 Mbps. This demonstrates the efficacy of the proposed multipoint parallel architecture in enhancing the EMD decomposition speed. The proposed architecture can be widely used for the real-time decomposition of high-speed signals in electronics measurement.