Temporal logic inference for interpretable fault diagnosis of bearings via sparse and structured neural attention

Abstract

This paper addresses the critical challenge of interpretability in machine learning methods for machine fault diagnosis by introducing a novel ad hoc interpretable neural network structure called Sparse Temporal Logic Network (STLN). STLN conceptualizes network neurons as logical propositions and constructs formal connections between them using specified logical operators, which can be articulated and understood as a formal language called Weighted Signal Temporal Logic. The network includes a basic word network using wavelet kernels to extract intelligible features, a transformer encoder with sparse and structured neural attention to locate informative signal segments relevant to decision-making, and a logic network to synthesize a coherent language for fault explanation. STLN retains the advantageous properties of traditional neural networks while facilitating formal interpretation through temporal logic descriptions. Empirical validation on experimental datasets shows that STLN not only performs robustly in fault diagnosis tasks, but also provides interpretable explanations of the decision-making process, thus enabling interpretable fault diagnosis.