A Low-Power Blocker-Tolerant Wideband Receiver With Bias-Tunable Mixer and Effective Switch Resistance Compensation

Abstract

This article presents a mixer-first blocker-tolerant receiver (RX) with effective switch resistance ( ${R} _{\text {SW}}$ ) compensation and high-Q selectivity. By analyzing the impact of non-ideal 1/N LO duty cycle and effective ${R} _{\text {SW}}$ on mixer-first RX, an effective ${R} _{\text {SW}}$ compensation technique is proposed to mitigate noise figure (NF) and out-of-band (OB) third-order intercept point (IIP3) performance degradation caused by reduced LO conduction duty cycle at high frequencies. A bias-tunable mixer is then designed, enabling dynamic adjustment of the mixer’s bias voltage and improvement of the effective ${R} _{\text {SW}}$ over the entire frequency band. It improves NF and OB-IIP3 performance at high frequencies with extremely low power consumption of LO drivers. In addition, the proposed RX achieves high-Q selectivity by combining an auxiliary N-path filter at RF and an analog finite-impulse-response (AFIR) filter at baseband (BB). The RX prototype, fabricated in a 55-nm CMOS process, achieves wideband tunable high-Q selectivity from 0.4 to 2.6 GHz with the double sideband (DSB) NF from 2.4 to 3.5 dB. The RX achieves +15.4-/19.2-dBm OB-IIP3 at 10-/80-MHz offset. When the −10-/0-dBm continuous-waveform (CW) blockers were injected at a 40-MHz offset, the DSB-NF only increased to 5.4/11.6 dB. Over the frequency range of interest, the total RX power consumption is 5.4–11.8 mW, with the LO driver requiring only 2.9 mW/GHz. The active chip area is 0.29 mm2.