{"title":"A Novel Gate-Buck-Based Drive Circuit for Mitigating the Degradation of SiC MOSFETs During Short Circuit","authors":"Xinsong Zhang;Yizhuan Zheng;Lei Zhang;Xibo Yuan;Rundong Guo;Lei Ren","doi":"10.1109/JESTPE.2025.3536033","DOIUrl":null,"url":null,"abstract":"Silicon carbide (SiC) metal oxide semiconductor field effect transistors (MOSFETs) have a small short-circuit (SC) tolerance, making them prone to degradation and even damage. The major factors that influence SiC MOSFET degradation are studied in this article. A phenomenon that a shorter SC time causes a more serious voltage stress is experimentally verified. Therefore, it is not appropriate for the protection circuit to only shorten the protection time. In addition, this article analyses the difference between hard switching fault (HSF) and fault under load (FUL). It is difficult for one SC detection to apply to both HSF and FUL with short detection time and high accuracy. Therefore, a novel gate-buck-based drive circuit is proposed to mitigate the degradation of SiC MOSFETs irrespective of the fault types. The proposed drive circuit can suppress the voltage spike stress in a short SC protection time, while it is suitable for both kinds of SC faults. The proposed drive circuit divides the drive process into three phases. Although the circuit does not improve the speed and accuracy of SC detection, it can alleviate degradation and extend service life by adjusting the voltage value of each phase. The driver mitigates the degradation with minimum changes in the switching speed and the power loss.","PeriodicalId":13093,"journal":{"name":"IEEE Journal of Emerging and Selected Topics in Power Electronics","volume":"13 3","pages":"3218-3232"},"PeriodicalIF":4.9000,"publicationDate":"2025-01-29","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"IEEE Journal of Emerging and Selected Topics in Power Electronics","FirstCategoryId":"5","ListUrlMain":"https://ieeexplore.ieee.org/document/10857408/","RegionNum":2,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"Q1","JCRName":"ENGINEERING, ELECTRICAL & ELECTRONIC","Score":null,"Total":0}
引用次数: 0
Abstract
Silicon carbide (SiC) metal oxide semiconductor field effect transistors (MOSFETs) have a small short-circuit (SC) tolerance, making them prone to degradation and even damage. The major factors that influence SiC MOSFET degradation are studied in this article. A phenomenon that a shorter SC time causes a more serious voltage stress is experimentally verified. Therefore, it is not appropriate for the protection circuit to only shorten the protection time. In addition, this article analyses the difference between hard switching fault (HSF) and fault under load (FUL). It is difficult for one SC detection to apply to both HSF and FUL with short detection time and high accuracy. Therefore, a novel gate-buck-based drive circuit is proposed to mitigate the degradation of SiC MOSFETs irrespective of the fault types. The proposed drive circuit can suppress the voltage spike stress in a short SC protection time, while it is suitable for both kinds of SC faults. The proposed drive circuit divides the drive process into three phases. Although the circuit does not improve the speed and accuracy of SC detection, it can alleviate degradation and extend service life by adjusting the voltage value of each phase. The driver mitigates the degradation with minimum changes in the switching speed and the power loss.
期刊介绍:
The aim of the journal is to enable the power electronics community to address the emerging and selected topics in power electronics in an agile fashion. It is a forum where multidisciplinary and discriminating technologies and applications are discussed by and for both practitioners and researchers on timely topics in power electronics from components to systems.