Circuit-to-Circuit Cosimulation for Closed-Loop Electrical Systems Using Waveform Relaxation

IF 6.5 1区 工程技术 Q1 ENGINEERING, ELECTRICAL & ELECTRONIC IEEE Transactions on Power Electronics Pub Date : 2025-02-12 DOI:10.1109/TPEL.2025.3541430
Md Moktarul Alam;Mohsen Koohestani;Mohammed Ramdani;Richard Perdriau
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Abstract

A computational time saving approach is proposed for the cosimulation of a buck–boost converter using waveform relaxation (WR) and time windowing. This study implements the Gauss–Seidel (GS) method, an iterative process that is employed to solve systems of linear and nonlinear equations using the WR technique, improving the convergence speed and accuracy of closed-loop system dynamic simulations. The proposed technique is applied to a 3.3-V buck–boost converter working both in buck and boost modes, therefore, simulations and measurements are carried out with a 1.8- to 5.5-V input voltage range. A comparative analysis between GS-WR without and with time windowing demonstrates that with time windowing, the number of iterations increases by 60$\%$ and 67.8$\%$, while the elapsed time is reduced by 22.3$\%$ and 26.6$\%$ with respect to a single time windows in buck and boost modes, respectively. Moreover, the optimal number of time windows (i.e., 4), computed by simulation, yields a 8.1$\%$ and 18.1$\%$ faster simulation time compared to the highest considered value in the study (i.e., 10). The outcome of this comparison reveals that a higher number of time windows does not necessarily result in a quicker computation compared to a lower value. More specifically, the GS-WR technique was found to be the main contributor to the acceleration, while time windowing ensures the convergence to the same results as the full system simulation.
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基于波形松弛的闭环电气系统电路间联合仿真
提出了一种利用波形松弛(WR)和时间窗对降压-升压变换器进行联合仿真的节省计算时间的方法。本研究实现了高斯-塞德尔(GS)方法,这是一种利用WR技术求解线性和非线性方程组的迭代过程,提高了闭环系统动态仿真的收敛速度和精度。所提出的技术应用于在降压和升压模式下工作的3.3 v降压-升压转换器,因此,在1.8至5.5 v输入电压范围内进行了仿真和测量。对无时间窗和有时间窗的GS-WR的比较分析表明,有时间窗的GS-WR在降压模式和升压模式下,迭代次数分别增加60 %和67.8 %,而运行时间分别减少22.3%和26.6%。此外,通过模拟计算的最佳时间窗数(即4)与研究中考虑的最高值(即10)相比,产生的模拟时间缩短了8.1美元和18.1美元。这种比较的结果表明,与较低的值相比,较高的时间窗数量并不一定导致更快的计算。更具体地说,发现GS-WR技术是加速的主要贡献者,而时间窗确保收敛到与全系统仿真相同的结果。
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来源期刊
IEEE Transactions on Power Electronics
IEEE Transactions on Power Electronics 工程技术-工程:电子与电气
CiteScore
15.20
自引率
20.90%
发文量
1099
审稿时长
3 months
期刊介绍: The IEEE Transactions on Power Electronics journal covers all issues of widespread or generic interest to engineers who work in the field of power electronics. The Journal editors will enforce standards and a review policy equivalent to the IEEE Transactions, and only papers of high technical quality will be accepted. Papers which treat new and novel device, circuit or system issues which are of generic interest to power electronics engineers are published. Papers which are not within the scope of this Journal will be forwarded to the appropriate IEEE Journal or Transactions editors. Examples of papers which would be more appropriately published in other Journals or Transactions include: 1) Papers describing semiconductor or electron device physics. These papers would be more appropriate for the IEEE Transactions on Electron Devices. 2) Papers describing applications in specific areas: e.g., industry, instrumentation, utility power systems, aerospace, industrial electronics, etc. These papers would be more appropriate for the Transactions of the Society which is concerned with these applications. 3) Papers describing magnetic materials and magnetic device physics. These papers would be more appropriate for the IEEE Transactions on Magnetics. 4) Papers on machine theory. These papers would be more appropriate for the IEEE Transactions on Power Systems. While original papers of significant technical content will comprise the major portion of the Journal, tutorial papers and papers of historical value are also reviewed for publication.
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