A 6.78-MHz Wireless Power and Data Transfer System Achieving Simultaneous 48.6% End-to-End Efficiency and 4.0-Mb/s Forward Data Delivery With Interference-Free Rectifier

IF 5.6 1区 工程技术 Q1 ENGINEERING, ELECTRICAL & ELECTRONIC IEEE Journal of Solid-state Circuits Pub Date : 2025-02-21 DOI:10.1109/JSSC.2025.3541290
Quanrong Zhuang;Junyi Sun;Bo Li;Xusheng Zhang;Zixu Wang;Yi Shi;Hao Qiu
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Abstract

Targeting implantable medical devices (IMDs), we presented a simultaneous wireless power and data transfer (WPDT) system, using the fundamental and harmonic components of the bridge inverter on the transmitter (TX) side to, respectively, deliver power and forward data. On the receiver (RX) side, we discovered the data-flipping problem using the conventional full-bridge rectifier (FBR), which is ascribed to the interference from its distorted input voltage ( ${V} {_{\text {AC}}}$ ). This problem is solved by the proposed interference-free rectifier (IFR) featuring its low-distortion staircase ${V} {_{\text {ac}}}$ . To further alleviate the crosstalk between power and data transfer, a tapped coil three-capacitor (TL3C) topology on the TX side together with a resonant topology on the RX side was proposed. The IFR IC was fabricated by a 0.18- $\mu $ m CMOS process, with which a 6.78-MHz WPDT system was implemented. Experimental results showed that compared with the conventional FBR, the interference voltage ratio (IVR) in the proposed IFR was reduced from −17 to −45.2 dB. At a distance of 6 mm, our system supported simultaneous 54.4-mW load power ( ${P} {_{\text {Load}}}$ ) and 4.0-Mb/s forward data rate (DR) with 48.6% end-to-end efficiency ( $\eta _{\text {E2E}}$ ). Both figure of merits (FoMs) for power and data transfer are the highest compared with previous results.
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6.78 mhz无线电源和数据传输系统,同时实现48.6%的端到端效率和4.0 mb /s的前向数据传输,无干扰整流器
针对植入式医疗设备(imd),我们提出了一种同时无线供电和数据传输(WPDT)系统,利用发射机侧桥式逆变器的基频和谐波分量分别传输电源和转发数据。在接收器(RX)端,我们发现了使用传统全桥整流器(FBR)的数据翻转问题,这归因于其畸变输入电压(${V} {_{\text {AC}}}}$)的干扰。所提出的无干扰整流器(IFR)具有低失真阶梯${V} {_{\text {ac}}}$,解决了这一问题。为了进一步缓解电源和数据传输之间的串扰,提出了一种位于TX侧的抽头线圈三电容(TL3C)拓扑和位于RX侧的谐振拓扑。采用0.18- $ $ μ $ m的CMOS工艺制作了IFR IC,实现了6.78 mhz WPDT系统。实验结果表明,与传统FBR相比,该IFR的干扰电压比(IVR)从−17 dB降低到−45.2 dB。在6毫米的距离上,我们的系统同时支持54.4 mw的负载功率(${P} {_{\text {load}}}$)和4.0 mb /s的转发数据速率(DR),端到端效率为48.6% ($\eta _{\text {E2E}}$)。与以前的结果相比,功率和数据传输的优点值(FoMs)都是最高的。
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来源期刊
IEEE Journal of Solid-state Circuits
IEEE Journal of Solid-state Circuits 工程技术-工程:电子与电气
CiteScore
11.00
自引率
20.40%
发文量
351
审稿时长
3-6 weeks
期刊介绍: The IEEE Journal of Solid-State Circuits publishes papers each month in the broad area of solid-state circuits with particular emphasis on transistor-level design of integrated circuits. It also provides coverage of topics such as circuits modeling, technology, systems design, layout, and testing that relate directly to IC design. Integrated circuits and VLSI are of principal interest; material related to discrete circuit design is seldom published. Experimental verification is strongly encouraged.
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