Dielectric and passivation layer optimization in carbon nanotube thin-film transistors for display driving applications

Abstract

Carbon nanotube thin-film transistors (CNT TFTs) hold significant potential for pixel-driving circuits in display technologies, particularly in emerging micro-LEDs (μLEDs). Their advantages include large-area fabrication, high current driving capability, mobilities in the range of several tens of cm²/Vs, and simple fabrication processes. However, key performance metrics, such as on-current (I_on), on/off current ratio (I_on/I_off), subthreshold swing (SS), hysteresis, and bipolarity, often involve trade-offs. Although excellent individual performance in these metrics has been achieved, comprehensive optimization, particularly at high drain-to-source voltages (V_ds), has been limited. In this study, we explore these critical trade-offs by optimizing the dielectric and passivation layers of CNT TFTs. Using a dielectric stack of HfO₂/SiO₂ and a passivation stack of SiO₂/Y₂O₃, we achieve CNT TFTs with optimal performance. Typical devices with a 10 μm channel length (L_ch) demonstrate an average I_on of ∼1.2 μA/μm, I_on/I_off exceeding 10⁶ for V_ds of −0.1 V and 10⁵ for V_ds of −4.1 V, SS of ∼180 mV/dec, hysteresis of ∼0.5 V, and minimal bipolar behavior, and reducing L_ch to 2 μm improves the average I_on to ∼16.4 μA/μm, representing the highest overall performance for CNT TFTs with micrometer channel lengths. Additionally, we demonstrate effective modulation of μLEDs by these TFTs. This work guides further advancements in CNT technology for display driving applications.